iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Add $aldff and $aldffe: flip-flops with async load.	Marcelina Kościelnicka	2021-10-02	1	-2/+13
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*	Add v2 memory cells.	Marcelina Kościelnicka	2021-08-11	1	-27/+99
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*	memory: Introduce $meminit_v2 cell, with EN input.	Marcelina Kościelnicka	2021-07-28	1	-5/+6
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*	Add latches to the manual.	Marcelina Kościelnicka	2020-06-26	1	-42/+165
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*	Add a few more gate types to the manual.	Marcelina Kościelnicka	2020-06-26	1	-8/+36
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*	Add new builtin FF types	Marcelina Kościelnicka	2020-06-23	1	-28/+178
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	The new types include: - FFs with async reset and enable (`$adffe`, `$_DFFE_[NP][NP][01][NP]_`) - FFs with sync reset (`$sdff`, `$_SDFF_[NP][NP][01]_`) - FFs with sync reset and enable, reset priority (`$sdffs`, `$_SDFFE_[NP][NP][01][NP]_`) - FFs with sync reset and enable, enable priority (`$sdffce`, `$_SDFFCE_[NP][NP][01][NP]_`) - FFs with async reset, set, and enable (`$dffsre`, `$_DFFSRE_[NP][NP][NP][NP]_`) - latches with reset or set (`$adlatch`, `$_DLATCH_[NP][NP][01]_`) The new FF types are not actually used anywhere yet (this is left for future commits).
*	Document division and modulo cells	Xiretza	2020-05-28	1	-0/+23
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*	Merge pull request #1553 from whitequark/manual-dffx	Claire Wolf	2020-01-28	1	-11/+90
\|\ \| \| \| \|	Document $dffe, $dffsr, $_DFFE_, $_DFFSR_ cells
\| *	manual: document $dffe, $dffsr, $_DFFE_, $_DFFSR_ cells.	whitequark	2019-12-05	1	-11/+90
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* \|	manual: document behavior of many comb cells more precisely.	whitequark	2019-12-04	1	-35/+56
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*	Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs	Clifford Wolf	2019-08-06	1	-1/+1
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	Add $specrule cells for $setup/$hold/$skew specify rules	Clifford Wolf	2019-04-23	1	-1/+1
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	Add CellTypes support for $specify2 and $specify3	Clifford Wolf	2019-04-23	1	-0/+4
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	manual: document some gates.	whitequark	2019-01-14	1	-9/+11
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*	manual: explain $tribuf cell.	whitequark	2019-01-14	1	-0/+10
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*	Fix typo in manual	Clifford Wolf	2019-01-07	1	-1/+1
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	manual: make description of $meminit ports match reality.	whitequark	2018-12-21	1	-3/+15
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*	manual: fix typos.	whitequark	2018-12-20	1	-2/+2
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*	manual: document $meminit cell and memory_* passes.	whitequark	2018-12-20	1	-6/+21
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*	Add $allconst and $allseq cell types	Clifford Wolf	2018-02-23	1	-1/+2
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	Add $_ANDNOT_ and $_ORNOT_ gates	Clifford Wolf	2017-05-17	1	-1/+2
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*	Add $live and $fair cell types, add support for s_eventually keyword	Clifford Wolf	2017-02-25	1	-1/+1
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*	Add $cover cell type and SVA cover() support	Clifford Wolf	2017-02-04	1	-1/+1
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*	Added $anyseq cell type	Clifford Wolf	2016-10-14	1	-1/+1
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*	Added $ff and $_FF_ cell types	Clifford Wolf	2016-10-12	1	-0/+4
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*	Removed $aconst cell type	Clifford Wolf	2016-08-30	1	-1/+1
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*	Removed $predict again	Clifford Wolf	2016-08-28	1	-1/+1
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*	Added $anyconst and $aconst	Clifford Wolf	2016-07-27	1	-1/+1
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*	Added $initstate cell type and vlog function	Clifford Wolf	2016-07-21	1	-1/+1
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*	After reading the SV spec, using non-standard predict() instead of expect()	Clifford Wolf	2016-07-21	1	-1/+1
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*	Added basic support for $expect cells	Clifford Wolf	2016-07-13	1	-1/+1
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*	Added $sop cell type and "abc -sop"	Clifford Wolf	2016-06-17	1	-0/+4
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*	Added read-enable to memory model	Clifford Wolf	2015-09-25	1	-2/+6
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*	Spell check (by Larry Doolittle)	Clifford Wolf	2015-08-14	1	-2/+2
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*	Added $assume cell type	Clifford Wolf	2015-02-26	1	-1/+1
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*	Added $equiv cell type	Clifford Wolf	2015-01-19	1	-1/+1
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*	Added more documentation fixmes for nontrivial register cells	Clifford Wolf	2014-12-08	1	-1/+9
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*	Added $lcu cell type	Clifford Wolf	2014-09-08	1	-1/+1
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*	Removed $bu0 cell type	Clifford Wolf	2014-09-04	1	-6/+0
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*	Added $alu cell type	Clifford Wolf	2014-08-30	1	-0/+4
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*	Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ ↵	Clifford Wolf	2014-08-16	1	-0/+4
\| \| \| \|	$_OAI4_
*	Renamed $_INV_ cell type to $_NOT_	Clifford Wolf	2014-08-15	1	-2/+2
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*	Removed old doc references to $safe_pmux	Clifford Wolf	2014-08-15	1	-4/+0
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*	Changed the $mem/$memwr WR_EN input to a per-data-bit enable signal	Clifford Wolf	2014-07-16	1	-3/+4
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*	Added $slice and $concat cell types	Clifford Wolf	2014-02-07	1	-0/+4
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*	Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)	Clifford Wolf	2014-02-03	1	-0/+7
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*	Added $assert cell	Clifford Wolf	2014-01-19	1	-0/+4
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*	Added correct handling of $memwr priority	Clifford Wolf	2014-01-03	1	-0/+3
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*	Added new cell types to manual	Clifford Wolf	2013-12-28	1	-0/+9
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*	Moved common techlib files to techlibs/common	Clifford Wolf	2013-09-15	1	-2/+2
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