| Commit message (Expand) | Author | Age | Files | Lines |
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| | * | | | | | | | | escape spaces with backslash when writing dep file | Oleg Endo | 2019-04-29 | 3 | -2/+17 |
| * | | | | | | | | | Improve $specrule interface | Clifford Wolf | 2019-04-23 | 1 | -2/+2 |
| * | | | | | | | | | Improve $specrule interface | Clifford Wolf | 2019-04-23 | 1 | -1/+2 |
| * | | | | | | | | | Add $specrule cells for $setup/$hold/$skew specify rules | Clifford Wolf | 2019-04-23 | 2 | -0/+17 |
| * | | | | | | | | | Rename T_{RISE,FALL}_AVG to T_{RISE,FALL}_TYP to better match verilog std nom... | Clifford Wolf | 2019-04-23 | 1 | -2/+2 |
| * | | | | | | | | | Add CellTypes support for $specify2 and $specify3 | Clifford Wolf | 2019-04-23 | 1 | -0/+3 |
| * | | | | | | | | | Add InternalCellChecker support for $specify2 and $specify3 | Clifford Wolf | 2019-04-23 | 1 | -7/+21 |
| * | | | | | | | | | Add specify parser | Clifford Wolf | 2019-04-23 | 1 | -0/+10 |
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| * | | | | | | / | Fixes for OAI4 cell implementation | David Shah | 2019-04-23 | 2 | -2/+2 |
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| * | | | | | | | Add log_debug() framework | Clifford Wolf | 2019-04-22 | 4 | -1/+58 |
| * | | | | | | | Merge pull request #905 from christian-krieg/feature/python_bindings | Clifford Wolf | 2019-04-22 | 6 | -4/+184 |
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| | * | | | | | | Global lists in rtlil.cc are now static objects | Benedikt Tutzer | 2019-04-03 | 1 | -10/+10 |
| | * | | | | | | Added support for changing Yosys namespace | Benedikt Tutzer | 2019-04-03 | 1 | -0/+1 |
| | * | | | | | | Fixed identation | Benedikt Tutzer | 2019-04-01 | 1 | -1/+1 |
| | * | | | | | | Merge remote-tracking branch 'origin/master' into feature/python_bindings | Benedikt Tutzer | 2019-03-28 | 15 | -127/+297 |
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| | * | | | | | | | Exposed generator script to make-process | Benedikt Tutzer | 2018-09-19 | 2 | -3888/+2 |
| | * | | | | | | | added functions whose definitions are split over multiple lines | Benedikt Tutzer | 2018-08-23 | 1 | -0/+60 |
| | * | | | | | | | added default yosys license text | Benedikt Tutzer | 2018-08-23 | 1 | -0/+19 |
| | * | | | | | | | Fixed segfault / multiple free issue with lists | Benedikt Tutzer | 2018-08-23 | 1 | -26/+38 |
| | * | | | | | | | Do not pass heap object to Python. This way they should be completely managed... | Benedikt Tutzer | 2018-08-22 | 1 | -323/+337 |
| | * | | | | | | | Fixed Identation | Benedikt Tutzer | 2018-08-22 | 1 | -189/+188 |
| | * | | | | | | | Wrapped functions that use unsigned int or type_t as types | Benedikt Tutzer | 2018-08-21 | 1 | -7/+127 |
| | * | | | | | | | added operators <, == and != | Benedikt Tutzer | 2018-08-21 | 1 | -0/+45 |
| | * | | | | | | | Added previousely missed functions | Benedikt Tutzer | 2018-08-21 | 1 | -1/+445 |
| | * | | | | | | | Deleted duplicate Destructor | Benedikt Tutzer | 2018-08-21 | 1 | -1/+0 |
| | * | | | | | | | added some checks if python is enabled to make sure everything compiles if py... | Benedikt Tutzer | 2018-08-20 | 4 | -7/+8 |
| | * | | | | | | | The share directory cannot be searched when used as a Python library, only in... | Benedikt Tutzer | 2018-08-20 | 2 | -1/+8 |
| | * | | | | | | | Python passes are now looked for in share/plugins and can be added by specify... | Benedikt Tutzer | 2018-08-20 | 1 | -4/+1 |
| | * | | | | | | | Fixed issue when using a python plugin in the yosys shell | Benedikt Tutzer | 2018-08-20 | 3 | -4/+28 |
| | * | | | | | | | Python Passes can now be added with the -m option or with the plugin command.... | Benedikt Tutzer | 2018-08-16 | 3 | -1/+96 |
| | * | | | | | | | Added Wrappers for: | Benedikt Tutzer | 2018-08-13 | 3 | -142/+2923 |
| | * | | | | | | | Saving id and pointer to c++ object. Object is valid only if both id and poin... | Benedikt Tutzer | 2018-08-01 | 1 | -8/+29 |
| | * | | | | | | | Setup is called automatically when the module is loaded, shutdown when python... | Benedikt Tutzer | 2018-08-01 | 1 | -16/+19 |
| | * | | | | | | | Cleaned up comments | Benedikt Tutzer | 2018-08-01 | 1 | -9/+3 |
| | * | | | | | | | Added Monitor class that can monitor all changes in a Design or in a Module | Benedikt Tutzer | 2018-07-10 | 1 | -0/+119 |
| | * | | | | | | | added destructors for wires and cells | Benedikt Tutzer | 2018-07-10 | 2 | -1/+16 |
| | * | | | | | | | removed debug output | Benedikt Tutzer | 2018-07-09 | 1 | -1/+0 |
| | * | | | | | | | commands can now be run on arbitrary designs, not only on the active one | Benedikt Tutzer | 2018-07-09 | 1 | -0/+10 |
| | * | | | | | | | multiple designs can now exist independent from each other. Cells/Wires/Modul... | Benedikt Tutzer | 2018-07-09 | 3 | -45/+118 |
| | * | | | | | | | Introduced namespace and removed class-prefixes to increase readability | Benedikt Tutzer | 2018-06-28 | 1 | -163/+165 |
| | * | | | | | | | changed references from hash-ids to IdString names | Benedikt Tutzer | 2018-06-28 | 1 | -64/+32 |
| | * | | | | | | | added wrappers for Design, Modules, Cells and Wires | Benedikt Tutzer | 2018-06-25 | 1 | -0/+244 |
| * | | | | | | | | Add "wbflip" command | Clifford Wolf | 2019-04-20 | 2 | -3/+6 |
| * | | | | | | | | Ignore 'whitebox' attr in flatten with "-wb" option | Eddie Hung | 2019-04-18 | 1 | -2/+2 |
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| * | | | | | | | Add "whitebox" attribute, add "read_verilog -wb" | Clifford Wolf | 2019-04-18 | 2 | -3/+7 |
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| * | | | | | | Add "read_ilang -lib" | Clifford Wolf | 2019-04-05 | 2 | -0/+25 |
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| * | | | | | Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signals | Clifford Wolf | 2019-03-23 | 2 | -1/+9 |
| * | | | | | Add fmcombine pass | Clifford Wolf | 2019-03-15 | 2 | -17/+32 |
| * | | | | | Add hashlib "<container>::element(int n)" methods | Clifford Wolf | 2019-03-14 | 1 | -0/+6 |
| * | | | | | Fix a bug in handling quotes in multi-cmd lines in Yosys scripts | Clifford Wolf | 2019-03-12 | 1 | -1/+7 |
