| Commit message (Expand) | Author | Age | Files | Lines |
* | Add support for cell arrays | Clifford Wolf | 2014-06-07 | 1 | -1/+2 |
* | Improved error message for options after front-end filename arguments | Clifford Wolf | 2014-06-04 | 1 | -0/+4 |
* | workaround for OpenBSD 'stdout' implementation | Clifford Wolf | 2014-05-03 | 1 | -1/+2 |
* | workaround for OpenBSD 'stdin' implementation | Clifford Wolf | 2014-05-02 | 1 | -1/+2 |
* | Added support for dlatchsr cells | Clifford Wolf | 2014-03-31 | 3 | -1/+71 |
* | Fixed typo in RTLIL::Module::addAdff() | Clifford Wolf | 2014-03-17 | 1 | -1/+1 |
* | Fixed typo in RTLIL::Module::{addSshl,addSshr} | Clifford Wolf | 2014-03-15 | 1 | -2/+2 |
* | Added RTLIL::Module::add{Dff,Dffsr,Adff,Dlatch}Gate() API | Clifford Wolf | 2014-03-15 | 2 | -1/+61 |
* | Added log_dump() support for generic pointers | Clifford Wolf | 2014-03-14 | 1 | -0/+3 |
* | Progress in Verific bindings | Clifford Wolf | 2014-03-14 | 1 | -1/+1 |
* | Added RTLIL::Module::Add{Inv,And,Or,Xor,Mux}Gate API | Clifford Wolf | 2014-03-14 | 2 | -0/+48 |
* | Hotfix for kernel/compatibility.h | Clifford Wolf | 2014-03-13 | 1 | -1/+2 |
* | Merged OSX fixes from Siesh1oo with some modifications | Clifford Wolf | 2014-03-13 | 5 | -2/+176 |
* | - kernel/register.h, kernel/driver.cc: refactor rewrite_yosys_exe()/get_shar... | Siesh1oo | 2014-03-12 | 2 | -34/+39 |
* | Added libs/minisat (copy of minisat git master) | Clifford Wolf | 2014-03-12 | 1 | -6/+1 |
* | Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys | Clifford Wolf | 2014-03-11 | 3 | -0/+18 |
* | Fixed a typo in RTLIL::Module::addReduce... | Clifford Wolf | 2014-03-10 | 1 | -5/+5 |
* | Added RTLIL::Module::add... helper methods | Clifford Wolf | 2014-03-10 | 2 | -0/+293 |
* | Fixed use of frozen literals in SatGen | Clifford Wolf | 2014-03-06 | 1 | -3/+2 |
* | Strictly zero-extend unsigned A-inputs of shift operations | Clifford Wolf | 2014-03-06 | 2 | -3/+3 |
* | Fixed const folding of $bu0 cells | Clifford Wolf | 2014-02-27 | 1 | -1/+1 |
* | Added support for $bu0 to SatGen | Clifford Wolf | 2014-02-26 | 1 | -4/+4 |
* | Added support for Minisat::SimpSolver + ezSAT frezze() API | Clifford Wolf | 2014-02-23 | 1 | -0/+1 |
* | Fixed small memory leak in Pass::call() | Clifford Wolf | 2014-02-23 | 1 | -1/+4 |
* | Added "design -push" and "design -pop" | Clifford Wolf | 2014-02-20 | 1 | -0/+4 |
* | Improved checking of internal cell conventions | Clifford Wolf | 2014-02-08 | 1 | -8/+17 |
* | Added $slice and $concat to CellTypes list | Clifford Wolf | 2014-02-07 | 1 | -0/+2 |
* | Added $slice and $concat cell types | Clifford Wolf | 2014-02-07 | 3 | -4/+54 |
* | Stronger checking of internal cells | Clifford Wolf | 2014-02-07 | 1 | -29/+37 |
* | Added echo command | Clifford Wolf | 2014-02-07 | 3 | -4/+47 |
* | Added generic RTLIL::SigSpec::parse_sel() with support for selection variables | Clifford Wolf | 2014-02-06 | 2 | -0/+19 |
* | Added support for #-comments in same line as command | Clifford Wolf | 2014-02-06 | 1 | -0/+2 |
* | Added support for backslash continuation in script files | Clifford Wolf | 2014-02-06 | 1 | -2/+13 |
* | Fixed bug in sequential sat proofs and improved handling of asserts | Clifford Wolf | 2014-02-04 | 1 | -7/+16 |
* | Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem) | Clifford Wolf | 2014-02-03 | 1 | -0/+2 |
* | Added RTLIL::SigSpec::to_single_sigbit() | Clifford Wolf | 2014-02-02 | 2 | -0/+10 |
* | Added yosys -H for command list | Clifford Wolf | 2014-01-30 | 1 | -1/+7 |
* | Added -h command line option | Clifford Wolf | 2014-01-29 | 1 | -2/+8 |
* | Added $assert support to satgen | Clifford Wolf | 2014-01-19 | 1 | -0/+21 |
* | Added $assert cell | Clifford Wolf | 2014-01-19 | 2 | -0/+8 |
* | Some improvements in log_dump_val_worker() templates | Clifford Wolf | 2014-01-17 | 1 | -1/+6 |
* | Added select -assert-none and -assert-any | Clifford Wolf | 2014-01-17 | 1 | -0/+3 |
* | Fixed SAT and ConstEval undef handling for $pmux and $safe_pmux | Clifford Wolf | 2014-01-03 | 2 | -10/+43 |
* | Added RTLIL::SigSpec::optimized() API | Clifford Wolf | 2014-01-03 | 2 | -0/+8 |
* | Added correct handling of $memwr priority | Clifford Wolf | 2014-01-03 | 1 | -0/+1 |
* | Added SAT undef model for $pmux and $safe_pmux | Clifford Wolf | 2014-01-02 | 1 | -4/+19 |
* | Major rewrite of "freduce" command | Clifford Wolf | 2014-01-02 | 1 | -5/+3 |
* | Added additional checks for A_SIGNED == B_SIGNED for cells with that constraint | Clifford Wolf | 2013-12-31 | 1 | -4/+11 |
* | Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen) | Clifford Wolf | 2013-12-29 | 1 | -11/+8 |
* | Added $bu0 cell (for easy correct $eq/$ne mapping) | Clifford Wolf | 2013-12-28 | 4 | -1/+12 |