iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Added support for here documents	Clifford Wolf	2014-07-26	3	-18/+63
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*	Added RTLIL::Cell::has(portname)	Clifford Wolf	2014-07-26	3	-8/+14
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*	Manual fixes for new cell connections API	Clifford Wolf	2014-07-26	1	-11/+11
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*	Changed users of cell->connections_ to the new API (sed command)	Clifford Wolf	2014-07-26	5	-179/+179
\| \| \| \| \| \| \| \| \|	git grep -l 'connections_' \| xargs sed -i -r -e ' s/(->\|\.)connections_\["([^"])"\] = (.);/\1set("\2", \3);/g; s/(->\|\.)connections_\["([^"])"\]/\1get("\2")/g; s/(->\|\.)connections_.at\("([^"])"\)/\1get("\2")/g; s/(->\|\.)connections_.push_back/\1connect/g; s/(->\|\.)connections_/\1connections()/g;'
*	Added some missing "const" in rtlil.h	Clifford Wolf	2014-07-26	2	-9/+9
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*	Added RTLIL::Module::connections()	Clifford Wolf	2014-07-26	2	-0/+6
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*	Added RTLIL::Module::connect(const RTLIL::SigSig&)	Clifford Wolf	2014-07-26	2	-0/+6
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*	Automatically pack SigSpec on copy/assign	Clifford Wolf	2014-07-26	2	-17/+63
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*	Added new RTLIL::Cell port access methods	Clifford Wolf	2014-07-26	2	-0/+71
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*	Renamed RTLIL::{Module,Cell}::connections to connections_	Clifford Wolf	2014-07-26	6	-190/+211
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*	Added copy-constructor-like module->addCell(name, other) method	Clifford Wolf	2014-07-26	2	-8/+12
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*	Use only module->addCell() and module->remove() to create and delete cells	Clifford Wolf	2014-07-25	2	-4/+54
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*	Added RTLIL::SigSpec is_chunk()/as_chunk() API	Clifford Wolf	2014-07-25	2	-0/+20
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*	Disabled cover() for non-linux builds	Clifford Wolf	2014-07-25	2	-2/+3
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*	Fixed typo in cover id	Clifford Wolf	2014-07-25	1	-1/+1
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*	Replaced more old SigChunk programming patterns	Clifford Wolf	2014-07-24	4	-11/+26
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*	Added cover_list() API	Clifford Wolf	2014-07-24	2	-2/+46
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*	Added "cover" command	Clifford Wolf	2014-07-24	4	-32/+57
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*	Some improvements in SigSpec packing/unpacking and checking	Clifford Wolf	2014-07-24	1	-8/+29
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*	Now using a dedicated ELF section for all coverage counters	Clifford Wolf	2014-07-24	3	-26/+21
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*	Small changes regarding cover() and check() in SigSpec	Clifford Wolf	2014-07-24	2	-10/+9
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*	Added support for YOSYS_COVER_FILE env variable	Clifford Wolf	2014-07-24	2	-3/+12
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*	Added cover() calls to RTLIL::SigSpec methods	Clifford Wolf	2014-07-24	1	-5/+93
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*	Added support for YOSYS_COVER_DIR env variable	Clifford Wolf	2014-07-24	1	-0/+26
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*	Added cover() API	Clifford Wolf	2014-07-24	2	-0/+35
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*	Added hashing to RTLIL::SigSpec relational and equal operators	Clifford Wolf	2014-07-23	2	-17/+71
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*	Disabled RTLIL::SigSpec::check() in release builds	Clifford Wolf	2014-07-23	1	-0/+2
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*	Fixed release build	Clifford Wolf	2014-07-23	1	-0/+2
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*	Added RTLIL::SigSpec::repeat()	Clifford Wolf	2014-07-23	2	-0/+10
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*	Removed RTLIL::SigSpec::optimize()	Clifford Wolf	2014-07-23	3	-115/+9
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*	Turned RTLIL::SigSpec::optimize() to a no-op: a packed SigSpec is now always ↵	Clifford Wolf	2014-07-23	1	-7/+42
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*	Removed RTLIL::SigSpec::expand() method	Clifford Wolf	2014-07-23	5	-200/+86
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*	Fixed all users of SigSpec::chunks_rw() and removed it	Clifford Wolf	2014-07-23	1	-2/+2
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*	Replaced RTLIL::SigSpec::operator!=() with inline version	Clifford Wolf	2014-07-23	2	-8/+1
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*	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3	Clifford Wolf	2014-07-23	3	-22/+14
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*	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3	Clifford Wolf	2014-07-23	2	-18/+4
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*	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3	Clifford Wolf	2014-07-23	2	-2/+40
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*	Some cleanups in RTLIL::SigChunk::SigChunk(const RTLIL::Const&)	Clifford Wolf	2014-07-23	2	-6/+6
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*	SigSpec refactoring: More cleanups of old SigSpec use pattern	Clifford Wolf	2014-07-22	2	-55/+50
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*	SigSpec refactoring: Added RTLIL::SigSpecIterator	Clifford Wolf	2014-07-22	1	-6/+28
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*	SigSpec refactoring: added RTLIL::SigSpec::operator[]	Clifford Wolf	2014-07-22	1	-1/+4
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*	SigSpec refactoring: rewrote some RTLIL::SigSpec methods to use unpacked form	Clifford Wolf	2014-07-22	1	-182/+113
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*	Removed RTLIL::SigChunk::compare()	Clifford Wolf	2014-07-22	2	-25/+5
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*	SigSpec refactoring: added RTLIL::SigSpec::bits() and pack/unpack api	Clifford Wolf	2014-07-22	2	-18/+135
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*	SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, ↵	Clifford Wolf	2014-07-22	4	-7/+7
\| \| \| \|	created interim RTLIL::SigSpec::chunks_rw()
*	SigSpec refactoring: change RTLIL::SigSpec::size() to be read-only	Clifford Wolf	2014-07-22	1	-2/+1
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*	SigSpec refactoring: using the accessor functions everywhere	Clifford Wolf	2014-07-22	6	-93/+93
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*	SigSpec refactoring: renamed the SigSpec members to chunks_ and width_ and ↵	Clifford Wolf	2014-07-22	2	-152/+158
\| \| \| \|	added accessor functions
*	SigSpec refactoring: renamed chunks and width to __chunks and __width	Clifford Wolf	2014-07-22	6	-244/+247
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*	Added support for scripts with labels	Clifford Wolf	2014-07-21	1	-11/+74
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