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* Fixed identationBenedikt Tutzer2019-04-011-1/+1
* Merge remote-tracking branch 'origin/master' into feature/python_bindingsBenedikt Tutzer2019-03-2815-127/+297
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| * Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signalsClifford Wolf2019-03-232-1/+9
| * Add fmcombine passClifford Wolf2019-03-152-17/+32
| * Add hashlib "<container>::element(int n)" methodsClifford Wolf2019-03-141-0/+6
| * Fix a bug in handling quotes in multi-cmd lines in Yosys scriptsClifford Wolf2019-03-121-1/+7
| * Improve determinism of IdString DB for similar scriptsClifford Wolf2019-03-114-5/+67
| * Add ENABLE_GLOB Makefile switchClifford Wolf2019-03-111-3/+5
| * Merge pull request #819 from YosysHQ/clifford/optdClifford Wolf2019-02-221-2/+16
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| | * Rename "yosys -U" to "yosys -P" to avoid confusion about "undefine"Clifford Wolf2019-02-211-3/+3
| | * Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behaviorClifford Wolf2019-02-211-2/+16
| * | Add FF support to wreduceClifford Wolf2019-02-201-0/+3
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| * Add optional nullstr argument to log_id()Clifford Wolf2019-01-151-1/+3
| * Fix typographical and grammatical errors and inconsistencies.whitequark2019-01-022-2/+2
| * proc_clean: remove any empty cases if all cases use all-def compare.whitequark2018-12-232-0/+14
| * tcl: add support for passing arguments to scripts.whitequark2018-12-201-7/+18
| * Improve ConstEval error handling for non-eval cell typesClifford Wolf2018-11-292-9/+19
| * Avoid assert when label is an empty stringJon Burgess2018-10-281-1/+1
| * fix unhandled std::out_of_range when calling yosys with 3-character argumentwhentze2018-10-221-2/+2
| * Documentation improvements etc.Ruben Undheim2018-10-131-3/+1
| * Support for 'modports' for System Verilog interfacesRuben Undheim2018-10-122-2/+2
| * Synthesis support for SystemVerilog interfacesRuben Undheim2018-10-122-0/+17
| * Fix IdString M in setup_stdcells()Adrian Wheeldon2018-10-041-1/+1
| * Fix Cygwin build and document needed packagesMiodrag Milanovic2018-09-191-1/+1
| * Merge pull request #591 from hzeller/virtual-overrideClifford Wolf2018-08-158-32/+31
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| | * Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-208-32/+31
| * | Map .eblif extension as blif.litghost2018-08-131-0/+2
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| * Provide source-location logging.Henner Zeller2018-07-192-44/+45
* | Exposed generator script to make-processBenedikt Tutzer2018-09-192-3888/+2
* | added functions whose definitions are split over multiple linesBenedikt Tutzer2018-08-231-0/+60
* | added default yosys license textBenedikt Tutzer2018-08-231-0/+19
* | Fixed segfault / multiple free issue with listsBenedikt Tutzer2018-08-231-26/+38
* | Do not pass heap object to Python. This way they should be completely managed...Benedikt Tutzer2018-08-221-323/+337
* | Fixed IdentationBenedikt Tutzer2018-08-221-189/+188
* | Wrapped functions that use unsigned int or type_t as typesBenedikt Tutzer2018-08-211-7/+127
* | added operators <, == and !=Benedikt Tutzer2018-08-211-0/+45
* | Added previousely missed functionsBenedikt Tutzer2018-08-211-1/+445
* | Deleted duplicate DestructorBenedikt Tutzer2018-08-211-1/+0
* | added some checks if python is enabled to make sure everything compiles if py...Benedikt Tutzer2018-08-204-7/+8
* | The share directory cannot be searched when used as a Python library, only in...Benedikt Tutzer2018-08-202-1/+8
* | Python passes are now looked for in share/plugins and can be added by specify...Benedikt Tutzer2018-08-201-4/+1
* | Fixed issue when using a python plugin in the yosys shellBenedikt Tutzer2018-08-203-4/+28
* | Python Passes can now be added with the -m option or with the plugin command....Benedikt Tutzer2018-08-163-1/+96
* | Added Wrappers for:Benedikt Tutzer2018-08-133-142/+2923
* | Saving id and pointer to c++ object. Object is valid only if both id and poin...Benedikt Tutzer2018-08-011-8/+29
* | Setup is called automatically when the module is loaded, shutdown when python...Benedikt Tutzer2018-08-011-16/+19
* | Cleaned up commentsBenedikt Tutzer2018-08-011-9/+3
* | Added Monitor class that can monitor all changes in a Design or in a ModuleBenedikt Tutzer2018-07-101-0/+119
* | added destructors for wires and cellsBenedikt Tutzer2018-07-102-1/+16
* | removed debug outputBenedikt Tutzer2018-07-091-1/+0
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