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* Improved undef handling in == and != for ConstEvalClifford Wolf2013-11-061-11/+25
* Improved width extension with regard to undef propagationClifford Wolf2013-11-062-67/+100
* Fixed handling of undef values in POS cells in ConstEvalClifford Wolf2013-11-061-3/+1
* Fixed handling of undef values in MUX select input in ConstEvalClifford Wolf2013-11-061-32/+58
* Added eval -vloghammer_report modeClifford Wolf2013-11-061-0/+3
* Fixed sign handling in const eval of sshl and sshrClifford Wolf2013-11-051-2/+6
* Write yosys version to output filesClifford Wolf2013-11-032-3/+3
* Fixed get_share_file_name() for installed yosysClifford Wolf2013-10-271-2/+3
* Added API and Makefile rules for share/ filesClifford Wolf2013-10-272-0/+22
* Added design->full_selection() helper methodClifford Wolf2013-10-271-0/+3
* Fixed handling of boolean attributes (passes)Clifford Wolf2013-10-241-1/+1
* Fixed handling of boolean attributes (kernel)Clifford Wolf2013-10-241-5/+17
* Changed NEW_WIRE API to return the wire, not the signalClifford Wolf2013-10-182-2/+2
* Added RTLIL NEW_WIRE macroClifford Wolf2013-10-182-0/+13
* Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_[PN]_Clifford Wolf2013-10-181-0/+14
* Added $sr, $dffsr and $dlatch cell typesClifford Wolf2013-10-181-1/+3
* Added version info to yosys command and added -V optionClifford Wolf2013-08-201-2/+13
* Implemented same div-by-zero behavior as found in other synthesis toolsClifford Wolf2013-08-151-5/+28
* Fixed signed div/mod in const eval (rounding and stuff)Clifford Wolf2013-08-151-2/+8
* Added sat -ignore_div_by_zero switchClifford Wolf2013-08-151-1/+6
* Added eval -brute_force_equiv_checker_x modeClifford Wolf2013-08-151-4/+10
* Added SAT support for $div and $mod cellsClifford Wolf2013-08-111-0/+46
* Added "clean -purge" and ";;;" supportClifford Wolf2013-08-111-0/+2
* Added ";;" as shortcut for "; clean;"Clifford Wolf2013-08-111-1/+4
* Added techmap -opt modeClifford Wolf2013-08-091-2/+5
* Some fixes to improve determinismClifford Wolf2013-08-092-2/+8
* Fixed SigPool::del() methodClifford Wolf2013-08-061-1/+1
* Added proper deallocation of history bufferClifford Wolf2013-08-061-0/+5
* Added "design" command (-reset, -save, -load)Clifford Wolf2013-07-272-12/+101
* Added "help -write-web-command-reference-manual"Clifford Wolf2013-07-261-0/+52
* Added $lut cells and abc lut mapping supportClifford Wolf2013-07-231-0/+3
* Fixed shift ops with large right hand sideClifford Wolf2013-07-091-1/+1
* Added "eval" passClifford Wolf2013-06-192-0/+86
* Fixed build with clangClifford Wolf2013-06-181-41/+69
* Added RTLIL::Module::fixup_ports() API and RTLIL::*::rewrite_sigspecs() APIClifford Wolf2013-06-182-2/+79
* Fixed even more ConstEval bugs found using xsthammerClifford Wolf2013-06-142-28/+58
* Added consteval testing to xsthammer and fixed bugsClifford Wolf2013-06-131-0/+8
* More fixes for bugs found using xsthammerClifford Wolf2013-06-131-0/+1
* Another fix for a bug found using xsthammerClifford Wolf2013-06-121-0/+10
* Sign-extension related fixes in SatGen and AST frontendClifford Wolf2013-06-101-8/+8
* Improvements and fixes in SAT codeClifford Wolf2013-06-101-5/+22
* Added history file read/write to driverClifford Wolf2013-06-101-0/+16
* Implemented temporal induction proofs in sat_solveClifford Wolf2013-06-091-2/+2
* Fixed handling of $_XOR_ in SAT generatorClifford Wolf2013-06-091-1/+1
* Added sequential solving support to sat_solveClifford Wolf2013-06-091-32/+49
* Set rl_basic_word_break_characters in shellClifford Wolf2013-06-091-0/+1
* Improved readline tab completionClifford Wolf2013-06-092-25/+75
* Look for yosys-abc and yosys-svgviewer where the main exe isClifford Wolf2013-06-092-1/+21
* Moved cmds from kernel/ to passes/cmds/Clifford Wolf2013-06-082-1736/+0
* Added support for shifter cells to SAT generatorClifford Wolf2013-06-081-7/+26