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| author | Clifford Wolf <clifford@clifford.at> | 2013-06-13 11:18:45 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-06-13 11:18:45 +0200 |
| commit | 0c6ffc4c656de69c92727580cd4c192211d10e6d (patch) | |
| tree | 9ad133c4d71f687f1046692e1a80481d3d114a89 /kernel | |
| parent | b1d39aa8656f8440eb748fbc7b5673d2129a2308 (diff) | |
| download | yosys-0c6ffc4c656de69c92727580cd4c192211d10e6d.tar.gz yosys-0c6ffc4c656de69c92727580cd4c192211d10e6d.tar.bz2 yosys-0c6ffc4c656de69c92727580cd4c192211d10e6d.zip | |
More fixes for bugs found using xsthammer
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/satgen.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/kernel/satgen.h b/kernel/satgen.h index 05afeabf5..991853c2c 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -128,6 +128,7 @@ struct SatGen if (cell->type == "$_INV_" || cell->type == "$not") { std::vector<int> a = importSigSpec(cell->connections.at("\\A"), timestep); std::vector<int> y = importSigSpec(cell->connections.at("\\Y"), timestep); + extendSignalWidthUnary(a, y, cell); ez->assume(ez->vec_eq(ez->vec_not(a), y)); return true; } |