| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #1308 from jakobwenzel/real_params | Clifford Wolf | 2019-08-20 | 1 | -1/+4 |
| |\ | | | | | Handle real values when deriving ast modules | ||||
| | * | handle real values when deriving ast modules | Jakob Wenzel | 2019-08-19 | 1 | -1/+4 |
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| * | | Fix typo | Eddie Hung | 2019-08-19 | 1 | -1/+1 |
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| * | Merge branch 'master' into eddie/pr1266_again | whitequark | 2019-08-18 | 4 | -15/+12 |
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| | * | Merge pull request #1283 from YosysHQ/clifford/fix1255 | Clifford Wolf | 2019-08-17 | 2 | -13/+10 |
| | |\ | | | | | | | Fix various NDEBUG compiler warnings | ||||
| | | * | Fix erroneous ifndef-NDEBUG in verific.cc | Clifford Wolf | 2019-08-17 | 1 | -3/+1 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | | * | Remove unused variable | Eddie Hung | 2019-08-16 | 1 | -5/+0 |
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| | | * | Fix various NDEBUG compiler warnings, closes #1255 | Clifford Wolf | 2019-08-13 | 2 | -9/+13 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Change signature of parse_blif to take IdString | Eddie Hung | 2019-08-15 | 2 | -2/+2 |
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| * / | Revert "Merge pull request #1280 from ↵ | Eddie Hung | 2019-08-12 | 1 | -1/+1 |
| |/ | | | | | | | YosysHQ/revert-1266-eddie/ice40_full_adder" This reverts commit c851dc13108021834533094a8a3236da6d9e0161, reversing changes made to f54bf1631ff37a83733c162e6ebd188c1d5ea18f. | ||||
| * | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER" | David Shah | 2019-08-10 | 1 | -1/+1 |
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| * | Merge pull request #1258 from YosysHQ/eddie/cleanup | Clifford Wolf | 2019-08-10 | 8 | -49/+49 |
| |\ | | | | | Cleanup a few barnacles across codebase | ||||
| | * | substr() -> compare() | Eddie Hung | 2019-08-07 | 5 | -12/+12 |
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| | * | RTLIL::S{0,1} -> State::S{0,1} | Eddie Hung | 2019-08-07 | 2 | -19/+19 |
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| | * | Merge remote-tracking branch 'origin/master' into eddie/cleanup | Eddie Hung | 2019-08-07 | 2 | -38/+36 |
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| | * | | stoi -> atoi | Eddie Hung | 2019-08-07 | 3 | -5/+5 |
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| | * | | IdString::str().substr() -> IdString::substr() | Eddie Hung | 2019-08-06 | 1 | -1/+1 |
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| | * | | Use std::stoi instead of atoi(<str>.c_str()) | Eddie Hung | 2019-08-06 | 3 | -5/+5 |
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| | * | | RTLIL::S{0,1} -> State::S{0,1} | Eddie Hung | 2019-08-06 | 1 | -16/+16 |
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| | * | | Use State::S{0,1} | Eddie Hung | 2019-08-06 | 1 | -1/+1 |
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| * | | | Merge pull request #1261 from YosysHQ/clifford/verific_init | Clifford Wolf | 2019-08-10 | 2 | -7/+60 |
| |\ \ \ | | | | | | | | | Automatically prune init attributes in verific front-end | ||||
| | * | | | Automatically prune init attributes in verific front-end, fixes #1237 | Clifford Wolf | 2019-08-07 | 2 | -7/+60 |
| | | |/ | |/| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Add __STDC_FORMAT_MACROS before <inttypes.h> as per @mithro | Eddie Hung | 2019-08-09 | 1 | -0/+1 |
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| * | | | Allow whitebox modules to be overwritten | Eddie Hung | 2019-08-07 | 1 | -1/+1 |
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| * | | | Run "clean" on mapped_mod in its own design | Eddie Hung | 2019-08-07 | 2 | -24/+10 |
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| * | | Merge pull request #1252 from YosysHQ/clifford/fix1231 | Clifford Wolf | 2019-08-07 | 1 | -15/+2 |
| |\ \ | | | | | | | Fix handling of functions/tasks without top-level begin-end block | ||||
| | * | | Fix handling of functions/tasks without top-level begin-end block, fixes #1231 | Clifford Wolf | 2019-08-06 | 1 | -15/+2 |
| | |/ | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge pull request #1241 from YosysHQ/clifford/jsonfix | David Shah | 2019-08-07 | 1 | -23/+34 |
| |\ \ | |/ |/| | Improved JSON attr/param encoding | ||||
| | * | Update JSON front-end to process new attr/param encoding | Clifford Wolf | 2019-08-01 | 1 | -23/+34 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge pull request #1239 from mmicko/mingw_fix | Clifford Wolf | 2019-08-02 | 1 | -0/+4 |
| |\ \ | |/ |/| | Fix formatting for msys2 mingw build | ||||
| | * | Fix formatting for msys2 mingw build using GetSize | Miodrag Milanovic | 2019-08-01 | 1 | -0/+4 |
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| * | | Merge pull request #1233 from YosysHQ/clifford/defer | Clifford Wolf | 2019-07-31 | 1 | -1/+2 |
| |\ \ | |/ |/| | Call "read_verilog" with -defer from "read" | ||||
| | * | Call "read_verilog" with -defer from "read" | Clifford Wolf | 2019-07-29 | 1 | -1/+2 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | verilog_lexer: Increase YY_BUF_SIZE to 65536 | David Shah | 2019-07-26 | 1 | -0/+3 |
| |/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | initialize noblackbox and nowb in AstModule::clone | Jakob Wenzel | 2019-07-22 | 1 | -0/+2 |
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| * | Fix typo, double "of" | Miodrag Milanovic | 2019-07-16 | 1 | -1/+1 |
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| * | Fix missing semicolon in Windows-specific code in aigerparse.cc. | William D. Jones | 2019-07-14 | 1 | -2/+2 |
| | | | | | Signed-off-by: William D. Jones <thor0505@comcast.net> | ||||
| * | genrtlil: emit \src attribute on CaseRule. | whitequark | 2019-07-08 | 1 | -0/+1 |
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| * | Allow attributes on individual switch cases in RTLIL. | whitequark | 2019-07-08 | 1 | -4/+9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parser changes are slightly awkward. Consider the following IL: process $0 <point 1> switch \foo <point 2> case 1'1 assign \bar \baz <point 3> ... case end end Before this commit, attributes are valid in <point 1>, and <point 3> iff it is immediately followed by a `switch`. (They are essentially attached to the switch.) But, after this commit, and because switch cases do not have an ending delimiter, <point 3> becomes ambiguous: the attribute could attach to either the following `case`, or to the following `switch`. This isn't expressible in LALR(1) and results in a reduce/reduce conflict. To address this, attributes inside processes are now valid anywhere inside the process: in <point 1> and <point 3> a part of case body, and in <point 2> as a separate rule. As a consequence, attributes can now precede `assign`s, which is made illegal in the same way it is illegal to attach attributes to `connect`. Attributes are tracked separately from the parser state, so this does not affect collection of attributes at all, other than allowing them on `case`s. The grammar change serves purely to allow attributes in more syntactic places. | ||||
| * | Merge pull request #1147 from YosysHQ/clifford/fix1144 | Clifford Wolf | 2019-07-03 | 1 | -81/+14 |
| |\ | | | | | Improve specify dummy parser | ||||
| | * | Some cleanups in "ignore specify parser" | Clifford Wolf | 2019-07-03 | 1 | -79/+5 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Improve specify dummy parser, fixes #1144 | Clifford Wolf | 2019-06-28 | 1 | -2/+9 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131 | Clifford Wolf | 2019-06-26 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Fix read_verilog assert/assume/etc on default case label, fixes ↵ | Clifford Wolf | 2019-07-02 | 1 | -0/+2 |
| | | | | | | | | | | | | | YosysHQ/SymbiYosys#53 Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Replace log_assert() with meaningful log_error() | Eddie Hung | 2019-06-28 | 1 | -1/+5 |
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| * | | Refactor for one "abc_carry" attribute on module | Eddie Hung | 2019-06-27 | 1 | -31/+37 |
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| * | | Remove unneeded include | Eddie Hung | 2019-06-27 | 1 | -3/+0 |
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| * | | Merge origin/master | Eddie Hung | 2019-06-27 | 1 | -1/+1 |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-24 | 1 | -0/+12 |
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| | * | Add upto and offset to JSON ports | Miodrag Milanovic | 2019-06-21 | 1 | -0/+12 |
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index : iCE40/yosys | |
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