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* Fixed handling of positional module parametersClifford Wolf2013-04-261-6/+4
* Only use sha1 checksums for names of parametric modules when the verbose form...Clifford Wolf2013-04-261-9/+20
* Fixed a bug in AST frontend for cases with non-blocking assigned variables as...Clifford Wolf2013-04-131-4/+4
* Now only use value from "initial" when no matching "always" block is foundClifford Wolf2013-03-313-7/+31
* Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)Clifford Wolf2013-03-315-3/+15
* Implemented proper handling of stub placeholder modulesClifford Wolf2013-03-283-6/+30
* Improvements and bugfixes for generate blocks with local signalsClifford Wolf2013-03-262-4/+2
* Fixed handling of unconditional generate blocksClifford Wolf2013-03-262-1/+19
* Added nosync attribute and some async reset related fixesClifford Wolf2013-03-253-34/+16
* Added mem2reg option to verilog frontendClifford Wolf2013-03-244-11/+28
* Another fix in mem2reg ast simplify logicClifford Wolf2013-03-241-1/+3
* Improved mem2reg handling in ast simplifierClifford Wolf2013-03-242-5/+35
* Tiny fixes to verilog parserClifford Wolf2013-03-232-1/+9
* Added help messages to ilang and verilog frontendsClifford Wolf2013-03-012-2/+57
* Moved stand-alone libs to libs/ directory and added libs/subcircuitClifford Wolf2013-02-274-4/+4
* Added support for verilog genblock[index].member syntaxClifford Wolf2013-02-264-11/+33
* Added support for "always @(*)"Clifford Wolf2013-01-161-0/+3
* added .gitignore filesClifford Wolf2013-01-052-0/+8
* initial importClifford Wolf2013-01-0517-0/+5999