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vhdl2verilog
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Author
Age
Files
Lines
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
1
-3
/
+3
*
Header changes so it will compile on VS
William Speirs
2014-10-17
1
-2
/
+5
*
Added make_temp_{file,dir}() and remove_directory() APIs
Clifford Wolf
2014-10-12
1
-18
/
+8
*
Added run_command() api to replace system() and popen()
Clifford Wolf
2014-10-12
1
-15
/
+4
*
Disabled vhdl2verilog command for win32 builds
Clifford Wolf
2014-10-11
1
-0
/
+5
*
Corrected spelling mistakes found by lintian
Ruben Undheim
2014-09-06
1
-1
/
+1
*
Changed frontend-api from FILE to std::istream
Clifford Wolf
2014-08-23
1
-4
/
+4
*
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
Clifford Wolf
2014-07-31
1
-0
/
+4
*
Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
1
-1
/
+0
*
Added passing of various options to vhdl2verilog
Clifford Wolf
2014-07-12
1
-5
/
+36
*
Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys
Clifford Wolf
2014-03-11
1
-4
/
+12
*
Fixed gcc compiler warning
Clifford Wolf
2014-03-06
1
-1
/
+2
*
Fixed vhdl2verilog temp dir name
Clifford Wolf
2014-03-01
1
-1
/
+1
*
Fixed vhdl2verilog help message
Clifford Wolf
2014-03-01
1
-3
/
+2
*
Added vhdl2verilog
Clifford Wolf
2014-02-21
2
-0
/
+155