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Author
Age
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Add AST_EDGE support to AstNode::detect_latch(), fixes #2241
Claire Wolf
2020-07-10
1
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+2
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Merge pull request #2179 from splhack/static-cast
clairexen
2020-07-01
4
-0
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+34
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static cast: simplify
Kazuki Sakamoto
2020-06-19
1
-0
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+7
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static cast: support changing size and signedness
Kazuki Sakamoto
2020-06-19
4
-0
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+27
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Allow constant function calls in for loops and generate if and case
Zachary Snow
2020-06-29
1
-1
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+5
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Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
whitequark
2020-06-19
1
-1
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+1
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Use C++11 final/override keywords.
whitequark
2020-06-18
1
-5
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+5
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Merge pull request #2112 from YosysHQ/claire/fix2040
clairexen
2020-06-09
2
-0
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+58
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Add latch detection for use_case_method in part-select write, fixes #2040
Claire Wolf
2020-06-04
2
-0
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+58
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Support packed arrays in struct/union.
Peter Crozier
2020-06-07
1
-12
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+131
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Merge pull request #2041 from PeterCrozier/struct
clairexen
2020-06-04
4
-103
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+310
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Merge branch 'master' into struct
Peter Crozier
2020-06-03
2
-4
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+23
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Generalise structs and add support for packed unions.
Peter Crozier
2020-05-12
4
-40
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+109
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Implement SV structs.
Peter Crozier
2020-05-08
4
-103
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+241
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Merge pull request #2006 from jersey99/signed-in-rtlil-wire
whitequark
2020-06-04
1
-0
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+1
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Preserve 'signed'-ness of a verilog wire through RTLIL
Vamsi K Vytla
2020-04-27
1
-0
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+1
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Merge pull request #2029 from whitequark/fix-simplify-memory-sv_logic
clairexen
2020-05-29
1
-2
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+2
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ast/simplify: don't bitblast async ROMs declared as `logic`.
whitequark
2020-05-05
1
-2
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+2
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Add force_downto and force_upto wire attributes.
Marcelina KoĆcielnicka
2020-05-19
2
-1
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+20
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Merge pull request #2027 from YosysHQ/eddie/verilog_neg_upto
Claire Wolf
2020-05-14
1
-1
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+1
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ast: swap range regardless of range_left >= 0
Eddie Hung
2020-05-04
1
-1
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+1
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Merge pull request #2022 from Xiretza/fallthroughs
whitequark
2020-05-08
2
-4
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+5
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Add YS_FALLTHROUGH macro to mark case fall-through
Xiretza
2020-05-07
2
-4
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+5
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Merge pull request #2005 from YosysHQ/claire/fix1990
Claire Wolf
2020-05-07
4
-14
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+80
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Fix handling of signed indices in bit slices
Claire Wolf
2020-05-02
1
-3
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+8
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Add AST_SELFSZ and improve handling of bit slices
Claire Wolf
2020-05-02
4
-5
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+20
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Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed offs...
Claire Wolf
2020-05-02
4
-7
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+53
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Merge pull request #2025 from YosysHQ/eddie/frontend_cleanup
Eddie Hung
2020-05-05
2
-13
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+13
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frontend: cleanup to use more ID::*, more dict<> instead of map<>
Eddie Hung
2020-05-04
2
-13
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+13
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verilog: set src attribute for primitives
Eddie Hung
2020-05-04
1
-1
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+3
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Merge pull request #1996 from boqwxp/rtlil_source_locations
Eddie Hung
2020-05-04
1
-13
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+13
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frontend: Include complete source location instead of just `location.first_li...
Alberto Gonzalez
2020-05-01
1
-13
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+13
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Clear current_scope when done with RTLIL generation, fixes #1837
Claire Wolf
2020-04-22
1
-0
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+4
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ilang, ast: Store parameter order and default value information.
Marcelina KoĆcielnicka
2020-04-21
2
-3
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+4
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Merge pull request #1851 from YosysHQ/claire/bitselwrite
Claire Wolf
2020-04-21
4
-15
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+207
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Make mask-and-shift the default for bitselwrite
Claire Wolf
2020-04-16
1
-1
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+1
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Add LookaheadRewriter for proper bitselwrite support
Claire Wolf
2020-04-16
4
-4
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+144
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Improved rewrite code for writing to bit slice (disabled for now)
Claire Wolf
2020-04-15
1
-12
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+64
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Merge pull request #1961 from whitequark/paramod-original-name
whitequark
2020-04-21
1
-0
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+3
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ast, rpc: record original name of $paramod\* as \hdlname attribute.
whitequark
2020-04-18
1
-0
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+3
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Extend support for format strings in Verilog front-end
Claire Wolf
2020-04-18
1
-8
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+38
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ast: Fix handling of identifiers in the global scope
David Shah
2020-04-16
2
-2
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+7
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Merge pull request #1918 from whitequark/simplify-improve_enum
whitequark
2020-04-15
1
-5
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+3
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ast/simplify: improve enum handling.
whitequark
2020-04-15
1
-5
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+3
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Fix 5bba9c3, closes #1876
Claire Wolf
2020-04-14
1
-7
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+13
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Merge pull request #1879 from jjj11x/jjj11x/package_decl
whitequark
2020-04-14
1
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+23
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support using previously declared types/localparams/params in package
Jeff Wang
2020-04-07
1
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+23
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duplicated enum item names should result in an error
Jeff Wang
2020-04-07
1
-2
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+3
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Merge pull request #1853 from YosysHQ/eddie/fix_dynslice
Eddie Hung
2020-04-02
1
-1
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+2
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ast: cap dynamic range select to size of signal, suppresses warnings
Eddie Hung
2020-04-01
1
-1
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+2
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