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| author | whitequark <whitequark@whitequark.org> | 2020-06-18 23:34:52 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2020-06-18 23:34:52 +0000 |
| commit | 7191dd16f9d486fbe107b2c24d1858c8f88329b3 (patch) | |
| tree | 11a32e71b94bc030afc32d3f8d4c8f3d3ada1588 /frontends/ast | |
| parent | dfde1cf1c540d5580d7bc7d24f9f59a004202d60 (diff) | |
| download | yosys-7191dd16f9d486fbe107b2c24d1858c8f88329b3.tar.gz yosys-7191dd16f9d486fbe107b2c24d1858c8f88329b3.tar.bz2 yosys-7191dd16f9d486fbe107b2c24d1858c8f88329b3.zip | |
Use C++11 final/override keywords.
Diffstat (limited to 'frontends/ast')
| -rw-r--r-- | frontends/ast/ast.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h index b8f24ee14..46864a4e1 100644 --- a/frontends/ast/ast.h +++ b/frontends/ast/ast.h @@ -322,12 +322,12 @@ namespace AST struct AstModule : RTLIL::Module { AstNode *ast; bool nolatches, nomeminit, nomem2reg, mem2reg, noblackbox, lib, nowb, noopt, icells, pwires, autowire; - ~AstModule() YS_OVERRIDE; - RTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> ¶meters, bool mayfail) YS_OVERRIDE; - RTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> ¶meters, const dict<RTLIL::IdString, RTLIL::Module*> &interfaces, const dict<RTLIL::IdString, RTLIL::IdString> &modports, bool mayfail) YS_OVERRIDE; + ~AstModule() override; + RTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> ¶meters, bool mayfail) override; + RTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> ¶meters, const dict<RTLIL::IdString, RTLIL::Module*> &interfaces, const dict<RTLIL::IdString, RTLIL::IdString> &modports, bool mayfail) override; std::string derive_common(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> ¶meters, AstNode **new_ast_out, bool quiet = false); - void reprocess_module(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Module *> &local_interfaces) YS_OVERRIDE; - RTLIL::Module *clone() const YS_OVERRIDE; + void reprocess_module(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Module *> &local_interfaces) override; + RTLIL::Module *clone() const override; void loadconfig() const; }; |