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* Add support for mockup clock signals in yosys-smtbmc vcd outputClifford Wolf2018-02-203-6/+111
* Fix handling of zero-length cell connections in SMT2 back-endClifford Wolf2018-02-081-0/+8
* Fixed gcc 7.2 "statement will never be executed" warningClifford Wolf2018-02-031-1/+1
* Fix smtio.py for large SMT2 S-expressionsClifford Wolf2018-01-291-1/+12
* Move user-provided smt2 info stmts to the top of the yosys-smtbmc smt2 outputClifford Wolf2018-01-181-3/+3
* Add "no driver for signal bit" error msg to btor back-endClifford Wolf2017-12-241-0/+2
* Simple fix BTOR memory encodingClifford Wolf2017-12-171-2/+2
* Improve BTOR memory encodingClifford Wolf2017-12-171-2/+16
* Add array support to btor back-endClifford Wolf2017-12-151-6/+169
* Add $anyconst/$anyseq support to btor back-endClifford Wolf2017-12-151-13/+51
* Merge branch 'master' into btor-ngClifford Wolf2017-12-143-7/+11
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| * Add yosys-smtbmc VCD writer support for memories with async writesClifford Wolf2017-12-143-7/+11
* | Merge branch 'master' into btor-ngClifford Wolf2017-12-141-14/+53
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| * Add smt2 back-end support for async write memoriesClifford Wolf2017-12-141-14/+53
| * Fixed "yosys-smtbmc -g" handling of no solutionClifford Wolf2017-11-271-1/+1
* | Add "write_btor -s" modeClifford Wolf2017-12-131-6/+50
* | Add state initval handling to btor back-endClifford Wolf2017-12-121-0/+25
* | Add btor back-end support for 'x' constantsClifford Wolf2017-12-121-1/+54
* | Add btor $shift/$shiftx supportClifford Wolf2017-12-112-7/+37
* | Fix btor back-end shift handlingClifford Wolf2017-12-102-5/+7
* | Add support for $pmux in btor back-endClifford Wolf2017-12-101-0/+23
* | Add support for more cell types to btor back-endClifford Wolf2017-12-102-6/+245
* | Fix btor concatClifford Wolf2017-12-091-1/+1
* | Fixed "yosys-smtbmc -g" handling of no solutionClifford Wolf2017-11-271-1/+1
* | Bugfixes in new BTOR back-endClifford Wolf2017-11-241-2/+3
* | Progress in new BTOR back-endClifford Wolf2017-11-231-36/+97
* | Progress in new BTOR back-endClifford Wolf2017-11-231-3/+95
* | Progress in new BTOR back-endClifford Wolf2017-11-231-14/+72
* | Progress with new BTOR backendClifford Wolf2017-11-231-8/+109
* | Add skeleton for new BTOR back-endClifford Wolf2017-11-232-0/+216
* | Remove old BTOR back-endClifford Wolf2017-11-234-1174/+0
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* Fix SMT2 handling of initstate in sub-modulesClifford Wolf2017-10-291-0/+3
* Improve smtio performance by using reader thread, not writer threadClifford Wolf2017-10-261-10/+30
* Use separate writer thread for talking to SMT solver to avoid read/write dead...Clifford Wolf2017-10-251-8/+23
* Improve p_* functions in smtio.pyClifford Wolf2017-10-251-21/+19
* Capsulate smt-solver read/write in separate functionsClifford Wolf2017-10-251-8/+24
* Fix a bug in yosys-smtbmc in ROM handlingClifford Wolf2017-10-251-0/+3
* Add $shiftx support to verilog front-endClifford Wolf2017-10-071-0/+17
* Rename "write_verilog -nobasenradix" to "write_verilog -decimal"Clifford Wolf2017-10-031-16/+13
* Fixed wrong declaration in Verilog backenddh732017-10-011-3/+3
* Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ...dh732017-10-011-3/+16
* Fix bug in write_smt2 (export logic driving hierarchical cells before exporti...Clifford Wolf2017-08-251-34/+34
* Add "yosys-smtbmc --smtc-init --smtc-top --noinit"Clifford Wolf2017-08-041-20/+66
* Add verilator support to testbenches generated by yosys-smtbmcClifford Wolf2017-07-211-3/+15
* Generate FSM-style testbenches in smtbmcClifford Wolf2017-07-121-5/+23
* Fix the fixed handling of x-bits in EDIF back-endClifford Wolf2017-07-111-1/+0
* Fix handling of x-bits in EDIF back-endClifford Wolf2017-07-111-1/+11
* Add attributes and parameter support to JSON front-endClifford Wolf2017-07-101-0/+2
* Change s/asserts/assertions/ in yosys-smtbmc log messagesClifford Wolf2017-07-071-2/+2
* Add "yosys-smtbmc --presat"Clifford Wolf2017-07-071-3/+23