| Commit message (Collapse) | Author | Age | Files | Lines |
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Before this commit, the meaning of "sync def" included some flip-flop
cells but not others. There was no actual reason for this; it was
just poorly defined.
After this commit, a "sync def" means that a wire holds design state
because it is connected directly to a flip-flop output, and may never
be unbuffered. This is not affected by presence of async inputs.
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This can be useful to distinguish e.g. a combinatorially driven wire
with type `CXXRTL_VALUE` from a module input with the same type, as
well as general introspection.
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Nodes driven by a constant value have type CXXRTL_VALUE and their
`next` pointer set to NULL. (This is already documented.)
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The only difference between "RTLIL" and "ILANG" is that the latter is
the text representation of the former, as opposed to the in-memory
graph representation. This distinction serves no purpose but confuses
people: it is not obvious that the ILANG backend writes RTLIL graphs.
Passes `write_ilang` and `read_ilang` are provided as aliases to
`write_rtlil` and `read_rtlil` for compatibility.
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This reflects the behaviour of $shr/$shl, which sign-extend their A
operands to the size of their output, then do a logical shift (shift in
0-bits).
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options after it.
Refer to the SMT-LIB specification, section 4.1.7. According to the spec, some options can only be specified in `start` mode. Once the solver sees `set-logic`, it moves to `assert` mode.
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
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verilog_backend: in non-SV mode, add a trigger for `always @*`
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This commit only affects translation of RTLIL processes (for which
there is limited support).
Due to the event-driven nature of Verilog, processes like
reg x;
always @*
x <= 1;
may never execute. This can be fixed in SystemVerilog code by using
`always_comb` instead of `always @*`, but in Verilog-2001 the options
are limited. This commit implements the following workaround:
reg init = 0;
reg x;
always @* begin
if (init) begin end
x <= 1;
end
Fixes #2271.
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verilog_backend: add `-sv` option, make `-o <filename>.sv` work
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See #2271.
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This bug was hidden if a header was generated.
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Use (and ignore) the expression provided to log_assert in NDEBUG builds
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This avoids warnings in NDEBUG builds emitted when a variable is only
used in log_assert, but is always defined.
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Use C++11 final/override/[[noreturn]]
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For several reasons:
* They're more convenient than accessing .data.
* They accommodate variably-sized types like size_t transparently.
* They statically ensure that no out of range conversions happen.
For now these are only provided for unsigned integers, but eventually
they should be provided for signed integers too. (Annoyingly this
affects conversions to/from `char` at the moment.)
Fixes #2127.
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cxxrtl: don't compute vital values in log_assert()
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This breaks NDEBUG builds.
Fixes #2166.
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cxxrtl: restrict the debug info of a blackbox to its ports.
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cxxrtl: avoid unused variable warning for transparent $memrd ports
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cxxrtl: Implement chunk-wise multiplication
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cxxrtl: fix sshr sign-extension.
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cxxrtl: fix rzext()
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This was a correctness issue, but one of the consequences is that it
resulted in jumps in generated machine code where there should have
been none. As a side effect of fixing the bug, Minerva SoC became 10%
faster.
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cxxrtl: handle multipart signals
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This avoids losing design visibility when using the `splitnets` pass.
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This can result in massive reduction in runtime, up to 50% depending
on workload. Currently people are using `-mllvm -inline-threshold=`
as a workaround (with clang++), but this solution is more portable.
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On Minerva, this improves runtime by around 10%, mostly by ensuring
that the logic driving FFs is packed into edge conditionals.
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Without unbuffering output wires of, at least, toplevel modules, it
is not possible to have most designs that rely on IO via toplevel
ports (as opposed to using exclusively blackboxes) converge within
one delta cycle. That seriously impairs the performance of CXXRTL.
This commit avoids unbuffering outputs of all modules solely so that
in future, CXXRTL could gain fully separate compilation, and not for
any present technical reason.
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This also fixes an edge case with (*keep*) input ports.
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cxxrtl: various compiler compatibility fixes
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