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| author | whitequark <whitequark@whitequark.org> | 2020-06-17 06:07:41 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-06-17 06:07:41 +0000 |
| commit | c4f20f744be57d4628400368d5fce040a9dbf269 (patch) | |
| tree | b86fc9b681052140f7e04b9755fe7ed33976335d /backends | |
| parent | eaf66037a59fc55d385d0bb4216b08fd565c05f1 (diff) | |
| parent | 8d98c3861dc702644e5cc333255726d1e1bf8e4f (diff) | |
| download | yosys-c4f20f744be57d4628400368d5fce040a9dbf269.tar.gz yosys-c4f20f744be57d4628400368d5fce040a9dbf269.tar.bz2 yosys-c4f20f744be57d4628400368d5fce040a9dbf269.zip | |
Merge pull request #2163 from jfng/cxxrtl-blackbox-debuginfo
cxxrtl: restrict the debug info of a blackbox to its ports.
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/cxxrtl/cxxrtl_backend.cc | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/backends/cxxrtl/cxxrtl_backend.cc b/backends/cxxrtl/cxxrtl_backend.cc index e48c5a403..72190d99a 100644 --- a/backends/cxxrtl/cxxrtl_backend.cc +++ b/backends/cxxrtl/cxxrtl_backend.cc @@ -1623,6 +1623,8 @@ struct CxxrtlWorker { for (auto wire : module->wires()) { if (wire->name[0] != '\\') continue; + if (module->get_bool_attribute(ID(cxxrtl_blackbox)) && (wire->port_id == 0)) + continue; count_public_wires++; if (debug_const_wires.count(wire)) { // Wire tied to a constant @@ -1649,19 +1651,21 @@ struct CxxrtlWorker { count_skipped_wires++; } } - for (auto &memory_it : module->memories) { - if (memory_it.first[0] != '\\') - continue; - f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(memory_it.second)); - f << ", debug_item(" << mangle(memory_it.second) << ", "; - f << memory_it.second->start_offset << "));\n"; - } - for (auto cell : module->cells()) { - if (is_internal_cell(cell->type)) - continue; - const char *access = is_cxxrtl_blackbox_cell(cell) ? "->" : "."; - f << indent << mangle(cell) << access << "debug_info(items, "; - f << "path + " << escape_cxx_string(get_hdl_name(cell) + ' ') << ");\n"; + if (!module->get_bool_attribute(ID(cxxrtl_blackbox))) { + for (auto &memory_it : module->memories) { + if (memory_it.first[0] != '\\') + continue; + f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(memory_it.second)); + f << ", debug_item(" << mangle(memory_it.second) << ", "; + f << memory_it.second->start_offset << "));\n"; + } + for (auto cell : module->cells()) { + if (is_internal_cell(cell->type)) + continue; + const char *access = is_cxxrtl_blackbox_cell(cell) ? "->" : "."; + f << indent << mangle(cell) << access << "debug_info(items, "; + f << "path + " << escape_cxx_string(get_hdl_name(cell) + ' ') << ");\n"; + } } dec_indent(); |