iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	write_cxxrtl: add basic documentation.	whitequark	2020-04-09	1	-1/+16
*	write_cxxrtl: add support for $dlatch and $dlatchsr cells.	whitequark	2020-04-09	1	-3/+16
*	write_cxxrtl: add support for $sr cell.	whitequark	2020-04-09	1	-27/+35
*	write_cxxrtl: add support for $slice and $concat cells.	whitequark	2020-04-09	1	-1/+16
*	write_cxxrtl: improve writable memory handling.	whitequark	2020-04-09	2	-65/+87
*	write_cxxrtl: add support for hierarchical designs.	whitequark	2020-04-09	1	-18/+107
*	write_cxxrtl: avoid undefined behavior on out-of-bounds memory access.	whitequark	2020-04-09	2	-46/+78
*	write_cxxrtl: statically schedule comb logic and localize wires.	whitequark	2020-04-09	2	-68/+368
*	write_cxxrtl: elide wires for results of comb cells used once.	whitequark	2020-04-09	1	-35/+359
*	write_cxxrtl: new backend.	whitequark	2020-04-09	3	-0/+2010
*	kernel: big fat patch to use more ID::, otherwise ID()	Eddie Hung	2020-04-02	9	-727/+727
*	Update backends/btor/btor.cc; credit @boqwxp	Eddie Hung	2020-04-02	1	-2/+1
*	kernel: use more ID::*	Eddie Hung	2020-04-02	11	-280/+280
*	Merge pull request #1770 from YosysHQ/claire/btor_symbols	Claire Wolf	2020-04-02	1	-36/+60
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\| *	Improve write_btor symbol handling	Claire Wolf	2020-03-14	1	-36/+60
* \|	Merge pull request #1765 from YosysHQ/claire/btor_info	Claire Wolf	2020-04-02	1	-9/+113
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\| *	Add info-file and cover features to write_btor	Claire Wolf	2020-03-13	1	-9/+113
* \|	Update `RTLIL::id2cstr()` usage to `log_id`.	Alberto Gonzalez	2020-04-01	1	-2/+2
* \|	Clean up pseudo-private member usage in `backends/intersynth/intersynth.cc`.	Alberto Gonzalez	2020-04-01	1	-22/+19
* \|	Clean up pseudo-private member usage in `backends/blif/blif.cc`.	Alberto Gonzalez	2020-04-01	1	-15/+11
* \|	Clean up pseudo-private member usage in `backends/verilog/verilog_backend.cc`.	Alberto Gonzalez	2020-04-01	1	-22/+19
* \|	Clean up pseudo-private member usage in `backends/spice/spice.cc`.	Alberto Gonzalez	2020-04-01	1	-13/+9
* \|	Clean up pseudo-private member usage in `backends/edif/edif.cc`.	Alberto Gonzalez	2020-04-01	1	-23/+18
* \|	Clean up pseudo-private member usage in `backends/ilang/ilang_backend.cc`.	Alberto Gonzalez	2020-04-01	1	-6/+6
* \|	Do not change solver output parsing for non-exists-forall problems.	Alberto Gonzalez	2020-03-26	1	-2/+6
* \|	Skip reading stdout from the solver that if it isn't a line reading only "sat...	Alberto Gonzalez	2020-03-26	1	-1/+3
* \|	Revert part of 0fda8308 from #1746 that broke other smtbmc flows	Claire Wolf	2020-03-24	1	-3/+1
* \|	fix typo in `write_smt2` help	Teguh Hofstee	2020-03-23	1	-1/+1
* \|	Merge pull request #1768 from boqwxp/smt2_cleanup	N. Engelhardt	2020-03-16	1	-5/+5
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\| * \|	Clean up pseudo-private member usage in `backends/smt2/smt2.cc`.	Alberto Gonzalez	2020-03-13	1	-5/+5
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* \|	Merge pull request #1746 from boqwxp/optimization	N. Engelhardt	2020-03-16	3	-1/+33
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\| * \|	Add support for optimizing exists-forall problems.	Alberto Gonzalez	2020-03-13	3	-1/+33
* \| \|	remove include where not used	Miodrag Milanovic	2020-03-13	1	-1/+0
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* \|	xaiger: remove some unnecessary operations ...	Eddie Hung	2020-03-06	1	-9/+2
* \|	abc9: (* keep *) wires to be PO only, not PI as well; fix scc handling	Eddie Hung	2020-03-06	1	-3/+4
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*	Make TimingInfo::TimingInfo(SigBit) constructor explicit	Eddie Hung	2020-02-27	1	-1/+1
*	write_xaiger: add comment about arrival times of flop outputs	Eddie Hung	2020-02-27	1	-0/+1
*	Get rid of (* abc9_{arrival,required} *) entirely	Eddie Hung	2020-02-27	1	-29/+15
*	abc9_ops: ignore (* abc9_flop *) if not '-dff'	Eddie Hung	2020-02-27	1	-38/+44
*	xilinx: improve specify functionality	Eddie Hung	2020-02-27	1	-0/+3
*	Merge pull request #1703 from YosysHQ/eddie/specify_improve	Eddie Hung	2020-02-21	1	-2/+10
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\| *	specify: system timing checks to accept min:typ:max triple	Eddie Hung	2020-02-13	1	-2/+10
* \|	Revert "abc9: fix abc9_arrival for flops"	Eddie Hung	2020-02-14	1	-5/+2
* \|	write_xaiger: default value for abc9_init	Eddie Hung	2020-02-13	1	-1/+1
* \|	abc9: fix abc9_arrival for flops	Eddie Hung	2020-02-13	1	-2/+5
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*	json: Change compat mode to directly emit ints <= 32 bits	R. Ou	2020-02-09	1	-3/+3
*	Merge pull request #1683 from whitequark/write_verilog-memattrs	whitequark	2020-02-07	1	-0/+1
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\| *	write_verilog: dump $mem cell attributes.	whitequark	2020-02-06	1	-0/+1
* \|	edif: more resilience to mismatched port connection sizes.	Marcin Kościelnicki	2020-02-06	1	-16/+27
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*	Merge pull request #1661 from YosysHQ/eddie/abc9_required	Eddie Hung	2020-02-05	1	-17/+42
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