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Merge branch 'master' of github.com:YosysHQ/yosys into firrtl_backend_fileinfo
Sahand Kashani
2020-04-08
14
-1131
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+1243
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kernel: big fat patch to use more ID::*, otherwise ID(*)
Eddie Hung
2020-04-02
9
-727
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+727
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Update backends/btor/btor.cc; credit @boqwxp
Eddie Hung
2020-04-02
1
-2
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+1
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kernel: use more ID::*
Eddie Hung
2020-04-02
11
-280
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+280
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Merge pull request #1770 from YosysHQ/claire/btor_symbols
Claire Wolf
2020-04-02
1
-36
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+60
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Improve write_btor symbol handling
Claire Wolf
2020-03-14
1
-36
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+60
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Merge pull request #1765 from YosysHQ/claire/btor_info
Claire Wolf
2020-04-02
1
-9
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+113
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Add info-file and cover features to write_btor
Claire Wolf
2020-03-13
1
-9
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+113
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Update `RTLIL::id2cstr()` usage to `log_id`.
Alberto Gonzalez
2020-04-01
1
-2
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+2
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Clean up pseudo-private member usage in `backends/intersynth/intersynth.cc`.
Alberto Gonzalez
2020-04-01
1
-22
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+19
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Clean up pseudo-private member usage in `backends/blif/blif.cc`.
Alberto Gonzalez
2020-04-01
1
-15
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+11
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Clean up pseudo-private member usage in `backends/verilog/verilog_backend.cc`.
Alberto Gonzalez
2020-04-01
1
-22
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+19
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Clean up pseudo-private member usage in `backends/spice/spice.cc`.
Alberto Gonzalez
2020-04-01
1
-13
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+9
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Clean up pseudo-private member usage in `backends/edif/edif.cc`.
Alberto Gonzalez
2020-04-01
1
-23
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+18
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Clean up pseudo-private member usage in `backends/ilang/ilang_backend.cc`.
Alberto Gonzalez
2020-04-01
1
-6
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+6
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Do not change solver output parsing for non-exists-forall problems.
Alberto Gonzalez
2020-03-26
1
-2
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+6
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Skip reading stdout from the solver that if it isn't a line reading only "sat...
Alberto Gonzalez
2020-03-26
1
-1
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+3
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Revert part of 0fda8308 from #1746 that broke other smtbmc flows
Claire Wolf
2020-03-24
1
-3
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+1
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fix typo in `write_smt2` help
Teguh Hofstee
2020-03-23
1
-1
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+1
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Remove unnecessary pruning of double-quoting
Sahand Kashani
2020-04-08
1
-5
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+0
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Remove use of auto for simple types + simplify src attribute computation
Sahand Kashani
2020-03-24
1
-10
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+5
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Refactor to directly call ILANG_BACKEND::dump_const() + directly lookup src a...
Sahand Kashani
2020-03-24
1
-68
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+15
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Indentation conventions
Sahand Kashani
2020-03-23
1
-5
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+6
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Const parameter in function (backends/firrtl/firrtl.cc)
Sahand Kashani-Akhavan
2020-03-23
1
-1
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+1
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Strip quotes around fileinfo strings
Sahand Kashani
2020-03-21
1
-1
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+5
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Add fileinfo to firrtl backend for assignments and non-instance cells
Sahand Kashani
2020-03-21
1
-21
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+30
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Refactor fileinfo emission characters to single location
Sahand Kashani
2020-03-20
1
-6
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+8
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Add fileinfo to firrtl backend for instances
Sahand Kashani
2020-03-19
1
-2
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+3
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Add fileinfo to firrtl backend for modules and wires
Sahand Kashani
2020-03-19
1
-12
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+20
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Add fileinfo to firrtl backend for top-level circuit
Sahand Kashani
2020-03-19
1
-1
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+62
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Merge pull request #1768 from boqwxp/smt2_cleanup
N. Engelhardt
2020-03-16
1
-5
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+5
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Clean up pseudo-private member usage in `backends/smt2/smt2.cc`.
Alberto Gonzalez
2020-03-13
1
-5
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+5
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Merge pull request #1746 from boqwxp/optimization
N. Engelhardt
2020-03-16
3
-1
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+33
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Add support for optimizing exists-forall problems.
Alberto Gonzalez
2020-03-13
3
-1
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+33
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remove include where not used
Miodrag Milanovic
2020-03-13
1
-1
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+0
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xaiger: remove some unnecessary operations ...
Eddie Hung
2020-03-06
1
-9
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+2
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abc9: (* keep *) wires to be PO only, not PI as well; fix scc handling
Eddie Hung
2020-03-06
1
-3
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+4
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Make TimingInfo::TimingInfo(SigBit) constructor explicit
Eddie Hung
2020-02-27
1
-1
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+1
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write_xaiger: add comment about arrival times of flop outputs
Eddie Hung
2020-02-27
1
-0
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+1
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Get rid of (* abc9_{arrival,required} *) entirely
Eddie Hung
2020-02-27
1
-29
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+15
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abc9_ops: ignore (* abc9_flop *) if not '-dff'
Eddie Hung
2020-02-27
1
-38
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+44
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xilinx: improve specify functionality
Eddie Hung
2020-02-27
1
-0
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+3
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Merge pull request #1703 from YosysHQ/eddie/specify_improve
Eddie Hung
2020-02-21
1
-2
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+10
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specify: system timing checks to accept min:typ:max triple
Eddie Hung
2020-02-13
1
-2
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+10
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Revert "abc9: fix abc9_arrival for flops"
Eddie Hung
2020-02-14
1
-5
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+2
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write_xaiger: default value for abc9_init
Eddie Hung
2020-02-13
1
-1
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+1
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abc9: fix abc9_arrival for flops
Eddie Hung
2020-02-13
1
-2
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+5
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json: Change compat mode to directly emit ints <= 32 bits
R. Ou
2020-02-09
1
-3
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+3
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Merge pull request #1683 from whitequark/write_verilog-memattrs
whitequark
2020-02-07
1
-0
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+1
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write_verilog: dump $mem cell attributes.
whitequark
2020-02-06
1
-0
/
+1
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