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* aiger: fixes for ports that have start_offset != 0Eddie Hung2020-05-022-9/+8
* cxxrtl: Round up constant widthDavid Shah2020-04-251-1/+1
* cxxrtl: use `cxxrtl_` prefix rather than `cxxrtl.`whitequark2020-04-241-45/+45
* cxxrtl: improve printing of narrow memories.whitequark2020-04-241-3/+4
* cxxrtl: fix handling of parametric modules with large parameters.whitequark2020-04-241-1/+1
* cxxrtl: keep the memory write queue sorted on insertion.Asu2020-04-221-3/+5
* Merge pull request #1979 from whitequark/cxxrtl-go-fasterClaire Wolf2020-04-222-184/+396
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| * cxxrtl: run edge detectors only once in eval().whitequark2020-04-221-6/+22
| * cxxrtl: add an unsupported knob for manipulating clock trees.whitequark2020-04-221-0/+18
| * cxxrtl: use log_id() where appropriate. NFC.whitequark2020-04-211-4/+4
| * cxxrtl: add (*cxxrtl.{comb,sync}*) annotations on black box outputs.whitequark2020-04-211-65/+186
| * cxxrtl: s/sync_{wire,type}/edge_{wire,type}/. NFC.whitequark2020-04-211-23/+23
| * cxxrtl: use one delta cycle for immediately converging netlists.whitequark2020-04-212-11/+21
| * cxxrtl: add -O6, a shortcut for running `proc; flatten`.whitequark2020-04-211-4/+14
| * cxxrtl: unbuffer module input wires.whitequark2020-04-211-31/+61
| * cxxrtl: simplify generated edge detection logic.whitequark2020-04-211-56/+29
| * cxxrtl: localize wires with multiple comb drivers, too.whitequark2020-04-211-32/+31
| * cxxrtl: detect buffered comb wires, not just feedback wires.whitequark2020-04-211-5/+40
* | write_json: dump default parameter valuesMarcelina Koƛcielnicka2020-04-211-0/+10
* | ilang, ast: Store parameter order and default value information.Marcelina Koƛcielnicka2020-04-211-2/+10
* | Merge pull request #1971 from YosysHQ/claire/edifkeepClaire Wolf2020-04-211-14/+108
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| * Improve net priorities in EDIF back-endClaire Wolf2020-04-211-0/+64
| * Ignore conflicting keep attributes, unless asked not to. Fixes #1733Claire Wolf2020-04-201-14/+44
* | Merge pull request #1961 from whitequark/paramod-original-namewhitequark2020-04-211-11/+2
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| * ast, rpc: record original name of $paramod\* as \hdlname attribute.whitequark2020-04-181-11/+2
* | cxxrtl: provide attributes to black box factories, too.whitequark2020-04-192-49/+57
* | cxxrtl: add templated black box support.whitequark2020-04-181-16/+193
* | cxxrtl: make eval() and commit() inline in blackboxes.whitequark2020-04-181-82/+103
* | cxxrtl: add simple black box support.whitequark2020-04-182-70/+311
* | cxxrtl: use ID::X instead of ID(X). NFC.whitequark2020-04-181-107/+107
* | cxxrtl: correctly handle `sync always` rules.whitequark2020-04-171-3/+13
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* Merge pull request #1947 from whitequark/cxxrtl-usabilitywhitequark2020-04-162-10/+19
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| * cxxrtl: make ROMs writable, document memory::operator[].whitequark2020-04-162-4/+6
| * cxxrtl: fix misleading example, caution about race conditions.whitequark2020-04-161-4/+13
| * cxxrtl: remove inaccurate comment. NFC.whitequark2020-04-161-2/+0
* | Merge pull request #1797 from epfl-vlsc/firrtl_backend_fileinfoClaire Wolf2020-04-161-29/+51
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| * Fix indentationSahand Kashani2020-04-091-3/+3
| * Remove dependency on ilang backend since we no longer use itSahand Kashani2020-04-081-1/+0
| * Merge branch 'master' of github.com:YosysHQ/yosys into firrtl_backend_fileinfoSahand Kashani2020-04-0814-1131/+1243
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| * | Remove unnecessary pruning of double-quotingSahand Kashani2020-04-081-5/+0
| * | Remove use of auto for simple types + simplify src attribute computationSahand Kashani2020-03-241-10/+5
| * | Refactor to directly call ILANG_BACKEND::dump_const() + directly lookup src a...Sahand Kashani2020-03-241-68/+15
| * | Indentation conventionsSahand Kashani2020-03-231-5/+6
| * | Const parameter in function (backends/firrtl/firrtl.cc)Sahand Kashani-Akhavan2020-03-231-1/+1
| * | Strip quotes around fileinfo stringsSahand Kashani2020-03-211-1/+5
| * | Add fileinfo to firrtl backend for assignments and non-instance cellsSahand Kashani2020-03-211-21/+30
| * | Refactor fileinfo emission characters to single locationSahand Kashani2020-03-201-6/+8
| * | Add fileinfo to firrtl backend for instancesSahand Kashani2020-03-191-2/+3
| * | Add fileinfo to firrtl backend for modules and wiresSahand Kashani2020-03-191-12/+20
| * | Add fileinfo to firrtl backend for top-level circuitSahand Kashani2020-03-191-1/+62