Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Added missing support for mem read enable ports to verilog back-end | Clifford Wolf | 2016-08-18 | 1 | -6/+14 |
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* | Improved smtbmc vcd generation performance | Clifford Wolf | 2016-08-18 | 2 | -20/+40 |
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* | Added printing of code loc of failed asserts to yosys-smtbmc | Clifford Wolf | 2016-08-17 | 3 | -1/+23 |
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* | Fixed upto handling in verilog back-end | Clifford Wolf | 2016-08-15 | 1 | -0/+3 |
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* | Merge branch 'master' of github.com:cliffordwolf/yosys | Clifford Wolf | 2016-07-30 | 2 | -1/+17 |
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| * | Added $initstate support to smtbmc flow | Clifford Wolf | 2016-07-27 | 2 | -1/+17 |
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* | | Added "write_verilog -defparam" | Clifford Wolf | 2016-07-30 | 1 | -2/+21 |
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* | | Added "write_verilog -nodec -nostr" | Clifford Wolf | 2016-07-30 | 1 | -4/+27 |
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* | write_json: also write module attributes. | whitequark | 2016-07-12 | 1 | -2/+6 |
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* | Yosys-smtbmc: Support for hierarchical VCD dumping | Clifford Wolf | 2016-07-11 | 2 | -23/+59 |
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* | Moved smt2 yosys info parsing from smtbmc.py to smtio.py | Clifford Wolf | 2016-07-11 | 3 | -16/+56 |
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* | Support for hierarchical designs in smt2 back-end | Clifford Wolf | 2016-07-10 | 2 | -24/+144 |
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* | Restored blif "-true - .." behavior, use "-true + .." for eddiehung-vtr behavior | Clifford Wolf | 2016-07-08 | 1 | -13/+15 |
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* | In BLIF, a .names without entries already always outputs 0 | Clifford Wolf | 2016-07-08 | 1 | -11/+0 |
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* | Merge branch 'yosys-0.5-vtr' of https://github.com/eddiehung/yosys into ↵ | Clifford Wolf | 2016-07-08 | 1 | -2/+19 |
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| * | Fix for all zero mask | eddiehung | 2015-05-03 | 1 | -0/+11 |
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| * | Escape '<' and '>' some more | eddiehung | 2015-05-03 | 1 | -1/+1 |
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| * | For vtr, escape angle brackets as well | eddiehung | 2015-04-28 | 1 | -1/+1 |
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| * | blifwriter: write out .names for true/false/undef type == '-' | eddiehung | 2015-04-28 | 1 | -0/+6 |
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* | | Added $sop support to BLIF back-end | Clifford Wolf | 2016-06-18 | 1 | -2/+29 |
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* | | Also escape "=" in spice output | Clifford Wolf | 2016-05-20 | 1 | -1/+1 |
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* | | Added "write_blif -noalias" | Clifford Wolf | 2016-05-06 | 1 | -6/+26 |
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* | | Added support for "active high" and "active low" latches in BLIF back-end | Clifford Wolf | 2016-04-22 | 1 | -0/+12 |
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* | | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 10 | -11/+11 |
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* | | Fixed some typos | Clifford Wolf | 2016-04-05 | 3 | -3/+3 |
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* | | Renamed opt_const to opt_expr | Clifford Wolf | 2016-03-31 | 1 | -1/+1 |
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* | | Bugfix in write_verilog for RTLIL processes | Clifford Wolf | 2016-03-14 | 1 | -9/+20 |
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* | | Added "write_edif -nogndvcc" | Clifford Wolf | 2016-03-08 | 1 | -17/+34 |
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* | | Be more conservative with net names in spice output | Clifford Wolf | 2016-03-02 | 1 | -18/+47 |
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* | | user-facing spelling fixes | Sebastian Kuzminsky | 2016-02-28 | 1 | -3/+3 |
| | | | | | | | | | | "speciefied" -> "specified" "unkown" -> "unknown" | ||||
* | | Added "int ceil_log2(int)" function | Clifford Wolf | 2016-02-13 | 1 | -8/+8 |
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* | | Added "write_blif -cname" mode | Clifford Wolf | 2016-01-06 | 1 | -1/+12 |
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* | | Added yosys-smtbmc -S | Clifford Wolf | 2015-12-20 | 1 | -6/+35 |
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* | | Import more std:: stuff into Yosys namespace | Clifford Wolf | 2015-10-25 | 2 | -7/+7 |
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* | | renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit() | Clifford Wolf | 2015-10-24 | 1 | -2/+2 |
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* | | Progress in yosys-smtbmc | Clifford Wolf | 2015-10-15 | 1 | -4/+10 |
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* | | Improvements in yosys-smtbmc | Clifford Wolf | 2015-10-15 | 3 | -2/+9 |
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* | | More "yosys-smtbmc -c" fixes | Clifford Wolf | 2015-10-14 | 2 | -9/+30 |
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* | | Fixed yosys-smtbmc -c | Clifford Wolf | 2015-10-14 | 1 | -2/+2 |
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* | | Added yosys-smtbmc copyright | Clifford Wolf | 2015-10-14 | 3 | -1/+36 |
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* | | Improvements in yosys-smtbmc | Clifford Wolf | 2015-10-14 | 3 | -21/+38 |
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* | | Added yosys-smtbmc | Clifford Wolf | 2015-10-14 | 2 | -1/+20 |
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* | | Implemented smtbmc.py -i | Clifford Wolf | 2015-10-14 | 1 | -25/+60 |
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* | | Added smtbmc.py | Clifford Wolf | 2015-10-13 | 4 | -0/+409 |
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* | | Added write_smt2 -wires | Clifford Wolf | 2015-10-13 | 1 | -7/+15 |
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* | | Bugfixes in writing of memories as Verilog | Clifford Wolf | 2015-09-25 | 1 | -7/+8 |
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* | | Added "yosys-smt2-wire" tag support to smt2 back-end | Clifford Wolf | 2015-08-31 | 1 | -0/+2 |
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* | | Fixed generation of smt2 concat statements | Clifford Wolf | 2015-08-15 | 1 | -3/+5 |
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* | | Another block of spelling fixes | Larry Doolittle | 2015-08-14 | 3 | -4/+4 |
| | | | | | | | | Smaller this time | ||||
* | | Re-created command-reference-manual.tex, copied some doc fixes to online help | Clifford Wolf | 2015-08-14 | 1 | -3/+3 |
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