| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | Add "whitebox" attribute, add "read_verilog -wb" | Clifford Wolf | 2019-04-18 | 1 | -1/+1 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 |
| | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | ||||
| * | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 1 | -2/+2 |
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| * | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -3/+3 |
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| * | namespace Yosys | Clifford Wolf | 2014-09-27 | 1 | -0/+3 |
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| * | Changed frontend-api from FILE to std::istream | Clifford Wolf | 2014-08-23 | 1 | -4/+4 |
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| * | Changed backend-api from FILE to std::ostream | Clifford Wolf | 2014-08-23 | 1 | -7/+7 |
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| * | Using log_assert() instead of assert() | Clifford Wolf | 2014-07-28 | 1 | -1/+0 |
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| * | Refactoring: Renamed RTLIL::Design::modules to modules_ | Clifford Wolf | 2014-07-27 | 1 | -1/+1 |
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| * | Refactoring: Renamed RTLIL::Module::cells to cells_ | Clifford Wolf | 2014-07-27 | 1 | -2/+2 |
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| * | Refactoring: Renamed RTLIL::Module::wires to wires_ | Clifford Wolf | 2014-07-27 | 1 | -1/+1 |
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| * | Changed users of cell->connections_ to the new API (sed command) | Clifford Wolf | 2014-07-26 | 1 | -1/+1 |
| | | | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;' | ||||
| * | Renamed RTLIL::{Module,Cell}::connections to connections_ | Clifford Wolf | 2014-07-26 | 1 | -1/+1 |
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| * | Replaced more old SigChunk programming patterns | Clifford Wolf | 2014-07-24 | 1 | -10/+6 |
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| * | Removed RTLIL::SigSpec::optimize() | Clifford Wolf | 2014-07-23 | 1 | -2/+0 |
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| * | SigSpec refactoring: using the accessor functions everywhere | Clifford Wolf | 2014-07-22 | 1 | -12/+12 |
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| * | SigSpec refactoring: renamed chunks and width to __chunks and __width | Clifford Wolf | 2014-07-22 | 1 | -12/+12 |
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| * | beautified write_intersynth | Johann Glaser | 2014-01-25 | 1 | -0/+9 |
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| * | Renamed "placeholder" to "blackbox" | Clifford Wolf | 2013-11-22 | 1 | -1/+1 |
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| * | Ignore explicit unconnected ports in intersynth backend | Clifford Wolf | 2013-11-03 | 1 | -3/+5 |
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| * | Fixed handling of boolean attributes (backends) | Clifford Wolf | 2013-10-24 | 1 | -1/+1 |
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| * | Added -selected option to various backends | Clifford Wolf | 2013-09-03 | 1 | -0/+17 |
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| * | Added -notypes option to intersynth backend | Clifford Wolf | 2013-03-24 | 1 | -7/+18 |
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| * | Fixed gcc build (intersynth backend) | Clifford Wolf | 2013-03-23 | 1 | -14/+14 |
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| * | Various improvements in intersynth backend | Clifford Wolf | 2013-03-23 | 1 | -9/+56 |
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| * | Added intersynth backend | Clifford Wolf | 2013-03-23 | 2 | -0/+141 |
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