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* Add "make bumpversion"Clifford Wolf2019-08-272-0/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Remove dupe in CHANGELOG, missing end quoteEddie Hung2019-08-261-2/+1
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* Merge tag 'yosys-0.9'Clifford Wolf2019-08-262-11/+107
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| * Yosys 0.9Clifford Wolf2019-08-261-1/+1
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Revert earliest to gcc-4.8, compile iverilog with default compilerEddie Hung2019-08-232-3/+3
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| * Revert "Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!"Eddie Hung2019-08-231-5/+3
| | | | | | | | This reverts commit c82b2fa31f8965be2680c87af6cd9ac5d26ead4d.
| * Remove .0 from clang-8.0Eddie Hung2019-08-231-2/+2
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| * Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!Eddie Hung2019-08-231-3/+5
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| * bionic -> xenial as its on whitelistEddie Hung2019-08-231-1/+1
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| * Bump gcc from 4.8 to 4.9 as undefined referenceEddie Hung2019-08-231-35/+7
| | | | | | | | | | ... to `__warn_memset_zero_len'. Also remove gcc-6, bump gcc-7 to gcc-9, clang from 5.0 to 8.0
| * Make macOS depenency clearMiodrag Milanovic2019-08-231-2/+5
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| * do not require boost if pyosys is not usedMiodrag Milanovic2019-08-221-0/+2
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| * require tcl-tk in BrewfileChris Shucksmith2019-08-221-0/+1
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| * Bump year in copyright noticeClifford Wolf2019-08-223-3/+3
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Visual Studio build fixMiodrag Milanovic2019-08-021-0/+1
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| * Fix linking issue for new mxe and pthreadMiodrag Milanovic2019-08-021-1/+2
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| * Fix yosys linking for mxeMiodrag Milanovic2019-08-021-1/+1
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| * New mxe hacks needed to support 2ca237eMiodrag Milanovic2019-08-021-0/+4
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| * Fix formatting for msys2 mingw build using GetSizeMiodrag Milanovic2019-08-028-17/+20
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| * Update CHANGELOGDavid Shah2019-07-261-10/+101
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-positionClifford Wolf2019-07-091-3/+2
| | | | | | write_verilog: fix placement of case attributes
| * Update CHANGELOGDavid Shah2019-07-091-0/+1
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * Merge pull request #1163 from whitequark/more-case-attrsClifford Wolf2019-07-093-16/+28
| | | | | | More support for case rule attributes
| * Merge pull request #1162 from whitequark/rtlil-case-attrsClifford Wolf2019-07-093-5/+15
| | | | | | Allow attributes on individual switch cases in RTLIL
| * Merge pull request #1159 from btut/fix/1090_segfault_cell_and_wireClifford Wolf2019-07-091-0/+3
| | | | | | Throw runtime exception when trying to convert inexistend C++ object to Python
| * Merge pull request #1147 from YosysHQ/clifford/fix1144Clifford Wolf2019-07-093-82/+26
| | | | | | Improve specify dummy parser
| * Merge pull request #1154 from whitequark/manual-sync-alwaysClifford Wolf2019-07-091-2/+3
| | | | | | manual: explain the purpose of `sync always`
| * Merge pull request #1153 from YosysHQ/dave/fix_multi_muxDavid Shah2019-07-093-3/+25
| | | | | | memory_dff: Fix checking of feedback mux input when more than one mux
| * Fix read_verilog assert/assume/etc on default case label, fixes ↵Clifford Wolf2019-07-091-0/+2
| | | | | | | | | | | | YosysHQ/SymbiYosys#53 Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * autotest.sh to define _AUTOTB when test_autotbEddie Hung2019-07-091-1/+1
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| * Merge pull request #1146 from gsomlo/gls-test-abc-extClifford Wolf2019-07-094-8/+29
| | | | | | tests: use optional ABCEXTERNAL when specified
| * Checkout yosys-0.9-rc branch of yosys-testsEddie Hung2019-07-021-1/+1
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| * Add missing CHANGELOG entriesEddie Hung2019-06-281-0/+3
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* | Merge pull request #1112 from acw1251/pyosys_sigsig_issueClifford Wolf2019-08-251-16/+10
|\ \ | | | | | | Fixed pyosys commands returning RTLIL::SigSig
| * | Fixed pyosys commands returning RTLIL::SigSigacw12512019-06-191-16/+10
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* | | Merge pull request #1327 from YosysHQ/clifford/pmgenClifford Wolf2019-08-245-32/+280
|\ \ \ | | | | | | | | Add pmgen slices and choices
| * | | indo -> intoEddie Hung2019-08-231-1/+1
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| * | | Fix port hanlding in pmgenClifford Wolf2019-08-231-4/+3
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | Add pmgen slices and choicesClifford Wolf2019-08-235-28/+277
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | Add undocumented featureEddie Hung2019-08-231-0/+8
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* | | | Forgot oneEddie Hung2019-08-231-1/+2
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* | | | Put abc_* attributes above portEddie Hung2019-08-233-14/+28
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* | | | Merge pull request #1326 from mmicko/doc-updateEddie Hung2019-08-231-2/+5
|\ \ \ \ | |/ / / |/| | | Make macOS dependency clear
| * | | Make macOS depenency clearMiodrag Milanovic2019-08-231-2/+5
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* | | Do not propagate mem2reg attribute through to resultEddie Hung2019-08-222-1/+3
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* | | SpellingEddie Hung2019-08-221-2/+2
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* | | Merge pull request #1322 from mmicko/pyosys_osxEddie Hung2019-08-221-0/+2
|\ \ \ | | | | | | | | do not require boost if pyosys is not used
| * | | do not require boost if pyosys is not usedMiodrag Milanovic2019-08-221-0/+2
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* | | Merge pull request #1319 from TeaEngineering/shuckc/brew-tcl-tkEddie Hung2019-08-221-0/+1
|\ \ \ | | | | | | | | require tcl-tk in Brewfile
| * | | require tcl-tk in BrewfileChris Shucksmith2019-08-221-0/+1
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