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* Add test for subarray access on multidimensional arraysLukasz Dalek2020-08-031-0/+12
* Fix subarray access conditionLukasz Dalek2020-08-031-1/+1
* Bump YOSYS_VERClaire Wolf2020-07-311-1/+1
* Add dffunmap pass.Marcelina Kościelnicka2020-07-313-0/+208
* opt_expr: Remove -clkinv option, make it the default.Marcelina Kościelnicka2020-07-315-18/+17
* synth_ice40: Use opt_dff.Marcelina Kościelnicka2020-07-307-390/+93
* synth_xilinx: Use opt_dff.Marcelina Kościelnicka2020-07-307-887/+219
* async2sync: Support all FF types.Marcelina Kościelnicka2020-07-303-145/+208
* Add opt_dff pass.Marcelina Kościelnicka2020-07-3012-3/+1790
* verilog_backend: Add handling for all FF types.Marcelina Kościelnicka2020-07-301-252/+134
* Merge pull request #2314 from YosysHQ/verifix_errorfixMiodrag Milanović2020-07-291-1/+3
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| * Clear last error messageMiodrag Milanovic2020-07-291-1/+3
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* opt_expr: Fix handling of $_XNOR_ cells with A = B.Marcelina Kościelnicka2020-07-292-1/+15
* ffinit: Fortify the code a bit.Marcelina Kościelnicka2020-07-281-24/+19
* Merge pull request #2301 from zachjs/for-loop-errorsclairexen2020-07-281-17/+19
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| * Clearer for loop error messagesZachary Snow2020-07-251-17/+19
* | Merge pull request #2306 from YosysHQ/mwk/equiv_induct-undefclairexen2020-07-282-1/+38
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| * | equiv_induct: Fix up assumption for $equiv cells in -undef mode.Marcelina Kościelnicka2020-07-272-1/+38
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* | intel_alm: direct M10K instantiationDan Ravensloft2020-07-278-39/+133
* | intel_alm: increase abc9 -WDan Ravensloft2020-07-262-7/+7
* | Merge pull request #2299 from zachjs/arg-loopclairexen2020-07-263-0/+73
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| * Avoid generating wires for function args which are constantZachary Snow2020-07-243-0/+73
* | async2sync: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-53/+11
* | memory_dff: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-12/+5
* | proc_dlatch: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-28/+8
* | pmux2shift: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-15/+4
* | wreduce: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-37/+7
* | techmap: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-41/+4
* | shregmap: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-39/+10
* | abc: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-25/+6
* | dffinit: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-41/+7
* | zinit: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-242-45/+13
* | dfflegalize: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-80/+25
* | clk2fflogic: Support all FF types.Marcelina Kościelnicka2020-07-2420-324/+245
* | satgen: Add support for dffe, sdff, sdffe, sdffce cells.Marcelina Kościelnicka2020-07-244-6/+88
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* Add utility module for representing flip-flops.Marcelina Kościelnicka2020-07-232-0/+441
* memory_dff: recognize more dff cellsMarcelina Kościelnicka2020-07-231-11/+112
* Add utility module for dealing with init attributes.Marcelina Kościelnicka2020-07-232-0/+147
* Merge pull request #2285 from YosysHQ/mwk/techmap-cellnameclairexen2020-07-234-1/+50
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| * techmap: Add _TECHMAP_CELLNAME_ special parameter.Marcelina Kościelnicka2020-07-214-1/+50
* | Merge pull request #2294 from Ravenslofty/intel_alm_timingsclairexen2020-07-235-78/+95
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| * | intel_alm: add additional ABC9 timingsDan Ravensloft2020-07-235-78/+95
* | | Remove EXPLICIT_CARRY logic.Keith Rothman2020-07-233-150/+2
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* | Merge pull request #2215 from boqwxp/qbfsat-solver-optionsclairexen2020-07-214-4/+45
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| * | smtio: Emit `mode: start` options before `set-logic` command and any other op...Alberto Gonzalez2020-07-201-1/+8
| * | smtio: Add support for parsing `yosys-smt2-solver-option` info statements.Alberto Gonzalez2020-07-201-3/+10
| * | qbfsat: Add `-solver-option` option.Alberto Gonzalez2020-07-202-1/+15
| * | smt2: Add `-solver-option` option.Alberto Gonzalez2020-07-201-0/+13
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* | Merge pull request #2282 from YosysHQ/claire/satunsatclairexen2020-07-202-4/+4
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| * | Only allow "sat" and "unsat" smt solver responses in yosys-smtbmcClaire Wolf2020-07-202-4/+4