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* | | | Fix spacingEddie Hung2019-07-261-3/+3
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* | | | Update test_autotb doc to reflect default value of zeroEddie Hung2019-07-261-1/+3
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* | | | Add doc for "test_autotb -seed" optionEddie Hung2019-07-261-0/+3
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* | | | Pop the CO bit from OEddie Hung2019-07-261-1/+3
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* | | | Allow adders/accumulators with 33 bits using CO outputEddie Hung2019-07-261-3/+8
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* | | | Add copyright header, comment on cascadeEddie Hung2019-07-241-4/+34
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* | | | Eliminate warnings by sizing O correctlyEddie Hung2019-07-231-1/+5
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* | | | Typo for Y_WIDTHEddie Hung2019-07-231-1/+1
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* | | | Fix muxAB logicEddie Hung2019-07-231-3/+2
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* | | | Remove debug printEddie Hung2019-07-231-1/+1
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* | | | Simplify and fix for MACsEddie Hung2019-07-232-56/+38
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* | | | Fix typoEddie Hung2019-07-231-13/+21
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* | | | Fix spacingEddie Hung2019-07-221-2/+2
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* | | | Remove debugEddie Hung2019-07-221-1/+0
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* | | | Pack hi and lo registers separatelyEddie Hung2019-07-222-39/+70
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* | | | SigSpec::extract() to return as many bits as poss if out of boundsEddie Hung2019-07-221-1/+7
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* | | | Rename according to vendor doc TN1295Eddie Hung2019-07-223-55/+56
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* | | | Pack Y registerEddie Hung2019-07-222-22/+38
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* | | | opt and wreduce necessary for -dspEddie Hung2019-07-221-2/+4
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* | | | Pack adders not just accumulatorsEddie Hung2019-07-222-16/+33
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* | | | Use minimum sized width wiresEddie Hung2019-07-221-7/+13
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* | | | Restore old ffY behaviourEddie Hung2019-07-191-16/+5
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* | | | CleanupEddie Hung2019-07-191-5/+5
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* | | | Indirection via $__soft_mulEddie Hung2019-07-192-9/+10
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* | | | Do not do sign extension in techmap; let packer do itEddie Hung2019-07-191-14/+5
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* | | | Merge remote-tracking branch 'origin/eddie/wreduce_add' into ice40dspEddie Hung2019-07-193-5/+29
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| * | | | Add another testEddie Hung2019-07-191-1/+24
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| * | | | Do not access beyond boundsEddie Hung2019-07-191-1/+1
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| * | | | Add an SigSpec::at(offset, defval) convenience methodEddie Hung2019-07-191-0/+1
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| * | | | Wrap A and B in sigmapEddie Hung2019-07-191-2/+2
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| * | | | Remove "top" from messageEddie Hung2019-07-191-1/+1
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* | | | | Merge remote-tracking branch 'origin/eddie/wreduce_add' into ice40dspEddie Hung2019-07-192-3/+121
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| * | | | Also optimise MSB of $subEddie Hung2019-07-191-3/+3
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| * | | | Add one more test with trimming Y_WIDTH of $subEddie Hung2019-07-191-11/+14
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| * | | | Be more explicitEddie Hung2019-07-191-6/+29
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| * | | | wreduce for $subEddie Hung2019-07-191-0/+23
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| * | | | Add tests for sub tooEddie Hung2019-07-191-1/+48
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| * | | | Add testEddie Hung2019-07-191-0/+22
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| * | | | SigSpec::extract to take negative lengthsEddie Hung2019-07-191-1/+1
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* | | | Do not $mul -> $__mul if A and B are less than maxwidthEddie Hung2019-07-191-1/+3
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* | | | Add DSP_MINWIDTH=11 for ice40 since ice40_dsp uses this thresholdEddie Hung2019-07-191-1/+1
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* | | | Add a DSP_MINWIDTH macro, and soft-logic for {A_WIDTH,B_WIDTH} <= 1 tooEddie Hung2019-07-191-28/+68
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* | | | Fine tune ice40_dsp.pmg, add support for packing subsets of registersEddie Hung2019-07-194-35/+47
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* | | | Add support for ice40 signed multipliersEddie Hung2019-07-191-13/+8
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* | | | Merge branch 'xc7dsp' into ice40dspEddie Hung2019-07-191-1/+1
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| * | | | Fix typo in BEddie Hung2019-07-191-1/+1
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| * | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-07-1829-228/+405
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* | | | | Merge remote-tracking branch 'origin/eddie/signed_ice40_dsp' into ice40dspEddie Hung2019-07-193-7/+239
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| * | | | ice40: Fix test_dsp_model.shDavid Shah2019-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | | | ice40/cells_sim.v: Fix sign of J and K partial productsDavid Shah2019-07-191-5/+7
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>