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* Fix signedness bugEddie Hung2019-09-201-2/+2
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* Update docEddie Hung2019-09-201-2/+2
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* Add a xilinx_dsp_cascade matcher for PCIN -> PCOUTEddie Hung2019-09-204-54/+105
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* Add an overload for port/param with default valueEddie Hung2019-09-201-0/+8
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* Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine from synth_ice40Eddie Hung2019-09-202-3/+2
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* Revert "Move mul2dsp before wreduce"Eddie Hung2019-09-201-4/+5
| | | | This reverts commit e4f4f6a9d5cf8bb23870fc483f16f66c80ceebab.
* Move mul2dsp before wreduceEddie Hung2019-09-201-5/+4
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* Small cleanupEddie Hung2019-09-201-19/+18
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* Disable support for SB_MAC16 reset since it is asyncEddie Hung2019-09-192-3/+7
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* SB_MAC16 ffCD to not pack same as ffOEddie Hung2019-09-191-2/+2
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* Add more complicated macc testcaseEddie Hung2019-09-192-5/+39
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* ClarifyEddie Hung2019-09-191-1/+2
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* Update doc for ice40_dspEddie Hung2019-09-191-1/+10
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* Tidy up, fix undrivenEddie Hung2019-09-191-32/+34
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* Add an indexEddie Hung2019-09-192-0/+3
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* $__ABC_REG to have WIDTH parameterEddie Hung2019-09-192-17/+18
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* Fix DSP48E1 timing by breaking P path if MREG or PREGEddie Hung2019-09-194-349/+363
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* Revert "Different approach to timing"Eddie Hung2019-09-194-195/+405
| | | | This reverts commit 41256f48a5f3231e231cbdf9380a26128f272044.
* Different approach to timingEddie Hung2019-09-194-405/+195
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* Fix width of DEddie Hung2019-09-191-1/+1
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* Add mac.sh and macc_tb.v for testingEddie Hung2019-09-192-0/+99
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* Suppress $anyseq warningsEddie Hung2019-09-191-15/+32
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* Use ID() macroEddie Hung2019-09-192-210/+210
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* Use (* techmap_autopurge *) to suppress techmap warningsEddie Hung2019-09-192-94/+99
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* D is 25 bits not 24 bits wideEddie Hung2019-09-191-1/+1
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* Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dspEddie Hung2019-09-1914-95/+723
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| * Add techmap_autopurge attribute, fixes #1381Clifford Wolf2019-09-191-5/+49
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Use extractinv for synth_xilinx -iseMarcin Koƛcielnicki2019-09-198-90/+502
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| * Added extractinv passMarcin Koƛcielnicki2019-09-195-0/+172
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| * Document (* gentb_skip *) attr for test_autotbEddie Hung2019-09-181-0/+3
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* | When two boxes connect to each other, need not be a (* keep *)Eddie Hung2019-09-191-6/+1
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* | Re-enable sign extension for C inputEddie Hung2019-09-191-4/+4
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* | synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2Eddie Hung2019-09-191-1/+4
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* | Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2Eddie Hung2019-09-191-1/+3
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* | Do not perform width-checks for DSP48E1 which is much more complicatedEddie Hung2019-09-191-11/+0
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* | Remove TODO as check should not be necessaryEddie Hung2019-09-191-1/+0
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* | Revert index to selectEddie Hung2019-09-191-1/+1
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* | Cleanup xilinx_dsp tooEddie Hung2019-09-191-37/+28
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* | Refactor ce{mux,pol} -> hold{mux,pol}Eddie Hung2019-09-192-77/+77
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* | Add HOLD/RST support for SB_MAC16Eddie Hung2019-09-192-69/+116
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* | Add support for SB_MAC16 CD and H registersEddie Hung2019-09-192-13/+73
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* | Refactor ice40_dsp.pmgEddie Hung2019-09-192-194/+426
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* | Add more entriesEddie Hung2019-09-191-0/+1
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* | Format macc.vEddie Hung2019-09-191-8/+8
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* | CleanupEddie Hung2019-09-191-8/+4
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* | Remove statEddie Hung2019-09-181-1/+0
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* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-183-15/+44
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| * Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxextEddie Hung2019-09-186-14/+291
| |\ | | | | | | peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells
| | * OopsEddie Hung2019-09-131-1/+1
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| | * Add counter-example from @cliffordwolfEddie Hung2019-09-131-0/+24
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