iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Fixed gcc build (intersynth backend)	Clifford Wolf	2013-03-23	1	-14/+14
*	Tiny fixes to verilog parser	Clifford Wolf	2013-03-23	2	-1/+9
*	Various improvements in intersynth backend	Clifford Wolf	2013-03-23	1	-9/+56
*	Added intersynth backend	Clifford Wolf	2013-03-23	2	-0/+141
*	Added help -write-tex-command-reference-manual option	Clifford Wolf	2013-03-21	1	-0/+38
*	Added eclipse CDT project files to .gitignore	Clifford Wolf	2013-03-21	1	-0/+2
*	Added -S option for simple synthesis to gate logic	Clifford Wolf	2013-03-21	1	-2/+17
*	Avoid verilog-2k in verilog backend	Clifford Wolf	2013-03-21	1	-0/+17
*	Disabled the per-default dumping of ILANG code	Clifford Wolf	2013-03-21	1	-1/+6
*	Added -nomap option to memory pass	Clifford Wolf	2013-03-21	1	-5/+19
*	Merge branch 'hansiglaser-master'	Clifford Wolf	2013-03-19	3	-10/+57
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\| *	added optimizations for single-bit $eq/$ne with constant input to opt_const	Clifford Wolf	2013-03-19	1	-0/+25
\| *	improved $mux optimization in opt_const	Clifford Wolf	2013-03-19	1	-2/+6
\| *	keep $mux and $_MUX_ optimizations separate in opt_const	Clifford Wolf	2013-03-19	1	-3/+3
\| *	added a TODO	Johann Glaser	2013-03-18	1	-0/+2
\| *	added one more suggestion to optimize MUXes in pass "opt_const"	Johann Glaser	2013-03-18	1	-0/+1
\| *	also optimize single-bit "$mux" cells in pass "opt_const", added suggestions	Johann Glaser	2013-03-18	1	-1/+5
\| *	fixed a crash when lines start with whitespace	Johann Glaser	2013-03-18	1	-2/+2
\| *	added description of Makefile include files for build configuration	Johann Glaser	2013-03-18	1	-6/+17
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*	More TODOs in README	Clifford Wolf	2013-03-18	1	-1/+7
*	Merge branch 'hansi'	Clifford Wolf	2013-03-18	13	-29/+30
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\| *	Removed date from auto-generated passes/techmap/stdcells.inc	Clifford Wolf	2013-03-18	1	-2/+1
\| *	Fixed abc eeror handling	Clifford Wolf	2013-03-18	1	-2/+2
\| *	add header to autogenerated file on its origin	Johann Glaser	2013-03-18	1	-1/+3
\| *	fixed typos	Johann Glaser	2013-03-18	12	-26/+26
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*	Fixed strerrno vs. strerror types in ABC pass	Clifford Wolf	2013-03-17	1	-4/+4
*	Merge branch 'hansi'	Clifford Wolf	2013-03-17	5	-22/+49
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\| *	Cleaned up ABC file/io error handling	Clifford Wolf	2013-03-17	1	-15/+13
\| *	Set execute bit on tests/openmsp430/run-synth.sh for real	Clifford Wolf	2013-03-17	1	-0/+0
\| *	added error checking at execution of ABC	Johann Glaser	2013-03-17	1	-1/+19
\| *	corrected typos	Johann Glaser	2013-03-17	1	-2/+2
\| *	set executable flags to run-synth.sh, added .gitignore	Johann Glaser	2013-03-17	1	-0/+3
\| *	added ckeck for Icarus Verilog, otherwise the tests are silently stopped	Johann Glaser	2013-03-17	1	-0/+7
\| *	corrected typos	Johann Glaser	2013-03-17	1	-16/+17
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*	Fixed gcc warnings and added error handling to shell escape	Clifford Wolf	2013-03-15	2	-1/+5
*	Added scc pass (find logic loops)	Clifford Wolf	2013-03-15	2	-0/+300
*	Added vi .*.swp files to .gitignore	Clifford Wolf	2013-03-15	1	-0/+1
*	Added [[CITE]] tags to abc and fsm_extract passes	Clifford Wolf	2013-03-15	2	-1/+15
*	Added additional functionality and cleanups in sigtools.h and celltypes.h	Clifford Wolf	2013-03-15	2	-0/+33
*	Changed prefix for selection operators from # to %	Clifford Wolf	2013-03-14	1	-28/+28
*	Added #ci and #co selection operators	Clifford Wolf	2013-03-14	2	-90/+136
*	Added more features to #x selection operator	Clifford Wolf	2013-03-14	1	-18/+42
*	Added "select -write" command	Clifford Wolf	2013-03-14	1	-7/+23
*	More support code for $sr cells	Clifford Wolf	2013-03-14	2	-1/+50
*	Added $sr cell type to celltypes.h	Clifford Wolf	2013-03-14	1	-0/+1
*	Fixed detection of public wires in opt_rmunused	Clifford Wolf	2013-03-10	1	-3/+3
*	Added shell escape to command language	Clifford Wolf	2013-03-10	1	-0/+13
*	Fixed and improved #x selection operator	Clifford Wolf	2013-03-08	1	-14/+44
*	Automatically select new objects in abc and techmap passes	Clifford Wolf	2013-03-08	3	-1/+19
*	Added ## selection operator (union all on stack)	Clifford Wolf	2013-03-08	1	-0/+9