index
:
iCE40/yosys
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
Commit message (
Expand
)
Author
Age
Files
Lines
*
Little steps in realmath test bench
Clifford Wolf
2014-06-16
2
-0
/
+3
*
Improved ternary support for real values
Clifford Wolf
2014-06-16
1
-13
/
+24
*
Use undef (x/z vs. NaN) rules for real values from IEEE Std 1800-2012
Clifford Wolf
2014-06-16
2
-0
/
+11
*
Fixed parsing of TOK_INTEGER (implies TOK_SIGNED)
Clifford Wolf
2014-06-16
1
-5
/
+11
*
Added found_real feature to AstNode::detectSignWidth
Clifford Wolf
2014-06-16
2
-6
/
+11
*
Added more calls to "hierarchy" to README file
Clifford Wolf
2014-06-15
1
-3
/
+8
*
Removed long running tests from tests/simple/realexpr.v (replaced by tests/re...
Clifford Wolf
2014-06-15
1
-55
/
+0
*
Added tests/realmath to "make test"
Clifford Wolf
2014-06-15
5
-4
/
+6
*
Improved AstNode::realAsConst for large numbers
Clifford Wolf
2014-06-15
1
-1
/
+1
*
Improved realmath test bench
Clifford Wolf
2014-06-15
2
-5
/
+13
*
Improved parsing of large integer constants
Clifford Wolf
2014-06-15
1
-11
/
+28
*
Improved AstNode::asReal for large integers
Clifford Wolf
2014-06-15
2
-10
/
+13
*
improved realmath test bench
Clifford Wolf
2014-06-14
1
-1
/
+4
*
improved (fixed) conversion of real values to bit vectors
Clifford Wolf
2014-06-14
4
-11
/
+30
*
progress in realmath test bench
Clifford Wolf
2014-06-14
2
-4
/
+45
*
Fixed relational operators for const real expressions
Clifford Wolf
2014-06-14
1
-8
/
+8
*
added first draft of real math testcase generator
Clifford Wolf
2014-06-14
1
-0
/
+52
*
Progress in presentation
Clifford Wolf
2014-06-14
5
-3
/
+109
*
Added %D and %c select commands
Clifford Wolf
2014-06-14
1
-2
/
+20
*
Added support for math functions
Clifford Wolf
2014-06-14
2
-0
/
+127
*
Added realexpr.v test case
Clifford Wolf
2014-06-14
1
-0
/
+13
*
Added handling of real-valued parameters/localparams
Clifford Wolf
2014-06-14
4
-24
/
+62
*
Implemented more real arithmetic
Clifford Wolf
2014-06-14
1
-27
/
+70
*
Implemented basic real arithmetic
Clifford Wolf
2014-06-14
3
-6
/
+51
*
Added real->int convertion in ast genrtlil
Clifford Wolf
2014-06-14
1
-0
/
+12
*
Added Verilog lexer and parser support for real values
Clifford Wolf
2014-06-13
4
-3
/
+31
*
Added read_verilog -sv options, added support for bit, logic,
Clifford Wolf
2014-06-12
7
-8
/
+52
*
Now we are in Yoys 0.3.0+ development
Clifford Wolf
2014-06-08
2
-1
/
+7
*
Tagging Yosys 0.3.0
Clifford Wolf
2014-06-08
2
-3
/
+47
*
Updated ABC to 7600ffb9340c
Clifford Wolf
2014-06-08
1
-1
/
+1
*
added tests for new verilog features
Clifford Wolf
2014-06-07
2
-6
/
+37
*
fixed cell array handling of positional arguments
Clifford Wolf
2014-06-07
1
-2
/
+11
*
Add support for cell arrays
Clifford Wolf
2014-06-07
6
-1
/
+70
*
Added support for repeat stmt in const functions
Clifford Wolf
2014-06-07
1
-0
/
+19
*
further improved const function support
Clifford Wolf
2014-06-07
3
-17
/
+22
*
made the generate..endgenrate keywords optional
Clifford Wolf
2014-06-06
1
-4
/
+8
*
improved const function support
Clifford Wolf
2014-06-06
3
-5
/
+41
*
fix functions with no block (but single statement, loop, etc.)
Clifford Wolf
2014-06-06
1
-11
/
+4
*
Added tests/simple/repwhile.v
Clifford Wolf
2014-06-06
1
-0
/
+20
*
improved ast simplify of const functions
Clifford Wolf
2014-06-06
1
-7
/
+28
*
added while and repeat support to verilog parser
Clifford Wolf
2014-06-06
4
-1
/
+31
*
Improved error message for options after front-end filename arguments
Clifford Wolf
2014-06-04
2
-1
/
+5
*
added tee cmd
Clifford Wolf
2014-06-03
2
-0
/
+89
*
Fixed log messages in memory_dff
Clifford Wolf
2014-06-01
1
-0
/
+2
*
Updated ABC to rev fa4404b395f0
Clifford Wolf
2014-05-29
1
-1
/
+1
*
Merge pull request #36 from hansiglaser/master
Clifford Wolf
2014-05-29
4
-8
/
+54
|
\
|
*
added log_header to miter and expose pass, show cell type for exposed ports
Johann Glaser
2014-05-28
2
-3
/
+9
|
*
new flags -ignore_miss_func and -ignore_miss_dir for read_liberty
Johann Glaser
2014-05-28
1
-4
/
+40
|
*
be more verbose when techmap yielded processes
Johann Glaser
2014-05-26
1
-1
/
+5
|
/
*
Fixed bug in opt_reduce (see vloghammer issue_044)
Clifford Wolf
2014-05-12
1
-1
/
+4
[next]