iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Bump version	Yosys Bot	2021-01-14	1	-1/+1
*	Merge pull request #2537 from pepijndevos/spice	Claire Xen	2021-01-13	1	-7/+15
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\| *	add buffer option to spice backend	Pepijn de Vos	2021-01-13	1	-7/+15
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*	Bump version	Yosys Bot	2021-01-05	1	-1/+1
*	Merge pull request #2522 from tomverbeure/simlib_typos2	whitequark	2021-01-04	1	-5/+5
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\| *	Fix some trivial typos.	Tom Verbeure	2021-01-03	1	-5/+5
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*	Bump version	Yosys Bot	2021-01-02	1	-1/+1
*	Merge pull request #2480 from YosysHQ/dave/nexus-lram	whitequark	2021-01-01	5	-1/+227
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\| *	nexus: Add LRAM inference	David Shah	2020-12-07	5	-1/+227
* \|	Merge pull request #2512 from umarcor/plugin-err	whitequark	2021-01-01	1	-1/+5
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\| * \|	plugin: enhance no-plugin error	umarcor	2020-12-29	1	-1/+5
* \| \|	Merge pull request #2515 from umarcor/fix/ghdl	whitequark	2021-01-01	1	-2/+2
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\| * \| \|	makefile: fix GHDL vars, replace GHDL_DIR with GHDL_PREFIX	umarcor	2020-12-30	1	-2/+2
* \| \| \|	Merge pull request #2518 from zachjs/recursion	whitequark	2021-01-01	4	-8/+99
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\| * \| \| \|	verilog: improved support for recursive functions	Zachary Snow	2020-12-31	4	-8/+99
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* \| \| \|	Merge pull request #2517 from zachjs/sv-tf-implied-direction	whitequark	2021-01-01	3	-0/+39
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\| * \| \|	sv: complete support for implied task/function port directions	Zachary Snow	2020-12-31	3	-0/+39
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* / /	Bump version	Yosys Bot	2020-12-30	1	-1/+1
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* \|	Merge pull request #2509 from zachjs/issue-2427	whitequark	2020-12-29	4	-1/+56
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\| * \|	Fix elaboration of whole memory words used as indices	Zachary Snow	2020-12-26	4	-1/+56
* \| \|	Merge pull request #2514 from umarcor/feat/ghdl	whitequark	2020-12-29	1	-0/+9
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\| * \| \|	makefile: add support for built-in ghdl-yosys-plugin	umarcor	2020-12-28	1	-0/+9
* \| \| \|	Bump version	Yosys Bot	2020-12-29	1	-1/+1
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* \| \|	Merge pull request #2511 from umarcor/feat/msys2-32	whitequark	2020-12-28	1	-5/+7
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\| * \| \|	makefile: rename msys2 to msys2-32, config PREFIX	umarcor	2020-12-28	1	-5/+7
* \| \| \|	Merge pull request #2507 from umarcor/fix/msys2	whitequark	2020-12-28	1	-2/+3
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\| * \| \|	kernel/yosys.h: undef CONST on WIN32	umarcor	2020-12-28	1	-2/+3
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* \| \|	Bump version	Yosys Bot	2020-12-28	1	-1/+1
* \| \|	Merge pull request #2510 from YosysHQ/whitequark/CODEOWNERS-verilog-ast	Claire Xen	2020-12-27	1	-0/+3
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\| * \|	CODEOWNERS: add @zachjs as Verilog/AST frontend owner	whitequark	2020-12-27	1	-0/+3
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* \|	Bump version	Yosys Bot	2020-12-27	1	-1/+1
* \|	Merge pull request #2506 from zachjs/const-arg-redeclare	Miodrag Milanović	2020-12-26	2	-5/+26
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\| * \|	Fix constants bound to redeclared function args	Zachary Snow	2020-12-26	2	-5/+26
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* \|	Bump version	Yosys Bot	2020-12-24	1	-1/+1
* \|	Merge pull request #2502 from ldoolitt/master	whitequark	2020-12-23	1	-2/+2
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\| * \|	passes/pmgen/pmgen.py: trivial change to remove C++ compiler warnings	Larry Doolittle	2020-12-23	1	-2/+2
* \| \|	Merge pull request #2501 from zachjs/genrtlil-tern-sign	whitequark	2020-12-23	2	-4/+10
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\| * \| \|	genrtlil: fix mux2rtlil generated wire signedness	Zachary Snow	2020-12-22	2	-4/+10
* \| \| \|	Merge pull request #2476 from zachjs/const-arg-width	whitequark	2020-12-23	2	-0/+18
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\| * \| \|	Fix constants bound to single bit arguments (fixes #2383)	Zachary Snow	2020-12-22	2	-0/+18
* \| \| \|	Bump version	Yosys Bot	2020-12-23	1	-1/+1
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* \| \|	Merge pull request #2499 from whitequark/cxxrtl-fixes	whitequark	2020-12-22	1	-9/+10
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\| * \| \|	cxxrtl: don't crash generating debug information for unused wires.	whitequark	2020-12-22	1	-9/+10
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* \| \|	Merge pull request #2498 from StefanBruens/Fix_opt_lut	whitequark	2020-12-22	1	-2/+4
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\| * \| \|	Fix use-after-free in LUT opt pass	StefanBruens	2020-12-22	1	-2/+4
* \| \| \|	Merge pull request #2497 from whitequark/cxxrtl-reflow	whitequark	2020-12-22	2	-446/+608
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\| * \| \|	cxxrtl: split processes into sync and case nodes.	whitequark	2020-12-22	1	-11/+26
\| * \| \|	kernel: undef Tcl macros interfering with cxxrtl.	whitequark	2020-12-22	1	-0/+2
\| * \| \|	cxxrtl: completely rewrite netlist layout code.	whitequark	2020-12-22	1	-406/+569
\| * \| \|	cxxrtl: simplify logic choosing wire type. NFCI.	whitequark	2020-12-21	1	-19/+8