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| * | | | | synth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WIRE_DELAY macroEddie Hung2020-01-101-4/+11
| * | | | | abc9: add abc9.verify and abc9.debug optionsEddie Hung2020-01-101-1/+13
| * | | | | abc9: fix typosEddie Hung2020-01-101-4/+4
| * | | | | Add abc9 sanity testEddie Hung2020-01-091-0/+40
| * | | | | Tune abc9.script.flowEddie Hung2020-01-091-6/+14
| * | | | | Add '-v' to &if for abc9.script.default.fastEddie Hung2020-01-091-1/+1
| * | | | | abc9: start post-fix with semicolonEddie Hung2020-01-091-1/+1
| * | | | | abc9.script.* constpad entries to start with '+'Eddie Hung2020-01-091-8/+8
| * | | | | Revert "abc9: if -script value is a file, then source it, otherwise commands"Eddie Hung2020-01-091-16/+11
| * | | | | Move abc9.* constpad entries to Abc9Pass::on_register()Eddie Hung2020-01-092-35/+37
| * | | | | Merge remote-tracking branch 'origin/clifford/onpassreg' into eddie/abc9_scra...Eddie Hung2020-01-093-1/+20
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| * | | | | | Add abc9.if.script.flow{,2} to constpadEddie Hung2020-01-081-6/+32
| * | | | | | scratchpad entry abc9.if.R to &if -REddie Hung2020-01-081-0/+6
| * | | | | | abc9: if -script value is a file, then source it, otherwise commandsEddie Hung2020-01-081-11/+16
| * | | | | | abc9: add time as last script commandEddie Hung2020-01-081-1/+1
| * | | | | | Fix {C} substitutionEddie Hung2020-01-081-1/+4
| * | | | | | Add RTLIL::constpad, init by yosys_setup(); use for abc9Eddie Hung2020-01-085-32/+39
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* | | | | | Merge pull request #1627 from YosysHQ/eddie/fix1626Eddie Hung2020-01-132-10/+227
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| * | | | | | Add #1626 testcaseEddie Hung2020-01-121-0/+217
| * | | | | | synth_ice40: -abc2 to always use `abc` even if `-abc9`Eddie Hung2020-01-121-10/+10
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* | | / / / write_xaiger: create holes_sigmap before modificationsEddie Hung2020-01-111-1/+2
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* | | | | Merge pull request #1625 from YosysHQ/eddie/abc9_mfsEddie Hung2020-01-116-86/+115
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| * | | | | write_xaiger: sort holes by offset as well as port_idEddie Hung2020-01-111-1/+2
| * | | | | abc9: remove -nomfs optionEddie Hung2020-01-111-12/+2
| * | | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_mfsEddie Hung2020-01-116-32/+48
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* | | | | | Merge pull request #1622 from YosysHQ/clifford/onpassregEddie Hung2020-01-113-1/+20
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| * | | | | Add Pass::on_register() and Pass::on_shutdown()Clifford Wolf2020-01-093-1/+20
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* | | | | Merge pull request #1624 from YosysHQ/eddie/abc9_leakEddie Hung2020-01-101-4/+2
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| * | | | abc9: fix memory leakEddie Hung2020-01-101-4/+2
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* / / / Bump versionClifford Wolf2020-01-091-1/+1
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* | | Fix abc9_xc7.box commentsEddie Hung2020-01-071-7/+14
* | | scc to use design->selected_modules() which avoids black/white-boxesEddie Hung2020-01-071-26/+25
| * | Bump ABCREV for upstream fixEddie Hung2020-01-111-1/+1
| * | write_xaiger: cleanup holes generationEddie Hung2020-01-081-80/+89
| * | write_xaiger: holes PIs only if whiteboxEddie Hung2020-01-081-13/+18
| * | Fix abc9_xc7.box commentsEddie Hung2020-01-071-7/+14
| * | Merge remote-tracking branch 'origin/master' into eddie/abc9_mfsEddie Hung2020-01-0730-1078/+1575
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* | | Bump ABCREV for upstream fixEddie Hung2020-01-071-1/+1
* | | Merge pull request #1618 from YosysHQ/eddie/aiger_fixesEddie Hung2020-01-074-8/+42
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| * | | read_aiger: consistency between ascii and binary; also name latchesEddie Hung2020-01-071-3/+9
| * | | Add testcasesEddie Hung2020-01-072-0/+17
| * | | tests/aiger: write Yosys outputEddie Hung2020-01-071-2/+2
| * | | read_aiger: connect identical signals togetherEddie Hung2020-01-071-0/+1
| * | | read_aiger: cope with latches and POs with same nameEddie Hung2020-01-071-2/+12
| * | | read_aiger: default -clk_name to be emptyEddie Hung2020-01-071-1/+1
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* | | Merge branch 'master' of github.com:YosysHQ/yosysEddie Hung2020-01-0626-1066/+1529
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| * \ \ Merge pull request #1181 from YosysHQ/xaig_dffEddie Hung2020-01-0626-1066/+1529
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| | * \ \ Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-067-1675/+512
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| | * | | abc9: uncomment nothing to map messageEddie Hung2020-01-061-4/+4
| | * | | FixesEddie Hung2020-01-061-0/+3