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* Add support for real-valued parameters + preserve type of parametersSahand Kashani2020-08-061-38/+113
* Add firrtl backend support for generic parameters in blackbox componentsSahand Kashani2020-07-231-58/+222
* Merge pull request #2215 from boqwxp/qbfsat-solver-optionsclairexen2020-07-214-4/+45
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| * smtio: Emit `mode: start` options before `set-logic` command and any other op...Alberto Gonzalez2020-07-201-1/+8
| * smtio: Add support for parsing `yosys-smt2-solver-option` info statements.Alberto Gonzalez2020-07-201-3/+10
| * qbfsat: Add `-solver-option` option.Alberto Gonzalez2020-07-202-1/+15
| * smt2: Add `-solver-option` option.Alberto Gonzalez2020-07-201-0/+13
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* Merge pull request #2282 from YosysHQ/claire/satunsatclairexen2020-07-202-4/+4
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| * Only allow "sat" and "unsat" smt solver responses in yosys-smtbmcClaire Wolf2020-07-202-4/+4
* | celltypes: Fix EN port name for some FF types.Marcelina Kościelnicka2020-07-201-4/+4
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* Merge pull request #2276 from YosysHQ/mwk/satgen-ccclairexen2020-07-203-1166/+1190
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| * satgen: Move importCell out of the header.Marcelina Kościelnicka2020-07-193-1166/+1190
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* Merge pull request #2275 from YosysHQ/mwk/sf2-clkint-fixMiodrag Milanović2020-07-171-2/+6
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| * sf2: Emit CLKINT even if -clkbuf not passedMarcelina Kościelnicka2020-07-171-2/+6
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* Merge pull request #2274 from YosysHQ/mwk/anlogic-ff-fixMiodrag Milanović2020-07-171-12/+12
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| * anlogic: Fix FF mapping.Marcelina Kościelnicka2020-07-171-12/+12
* | Merge pull request #2229 from Ravenslofty/sf2_remove_sf2_iobsclairexen2020-07-164-214/+135
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| * | sf2: replace sf2_iobs with {clkbuf,iopad}mapDan Ravensloft2020-07-094-214/+135
* | | Merge pull request #2273 from whitequark/write-verilog-always-star-initialclairexen2020-07-161-0/+5
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| * | verilog_backend: in non-SV mode, add a trigger for `always @*`.whitequark2020-07-161-0/+5
* | | Merge pull request #2272 from whitequark/write-verilog-svclairexen2020-07-162-11/+20
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| * | verilog_backend: add `-sv` option, make `-o <filename>.sv` work.whitequark2020-07-162-11/+20
* | | Merge pull request #2238 from YosysHQ/mwk/dfflegalize-anlogicMiodrag Milanović2020-07-164-62/+49
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| * | | anlogic: Use dfflegalize.Marcelina Kościelnicka2020-07-144-62/+49
* | | | Merge pull request #2226 from YosysHQ/mwk/nuke-efinix-gbufMiodrag Milanović2020-07-165-122/+11
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| * | | | efinix: Nuke efinix_gbuf in favor of clkbufmap.Marcelina Kościelnicka2020-07-045-122/+11
* | | | | Merge pull request #2270 from whitequark/cxxrtl-fix-typowhitequark2020-07-161-1/+1
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| * | | | | cxxrtl: fix typo. NFC.whitequark2020-07-141-1/+1
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* | | | | Merge pull request #2269 from YosysHQ/claire/bisonwallwhitequark2020-07-152-64/+57
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| * | | | | Treat all bison warnings as errors in verilog front-endClaire Wolf2020-07-151-1/+1
| * | | | | Use %precedence in verilog_parser.yClaire Wolf2020-07-151-4/+4
| * | | | | Fix bison warnings for missing %emptyClaire Wolf2020-07-151-59/+52
| * | | | | Run bison with -Wall for verilog front-endClaire Wolf2020-07-151-1/+1
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* | | | | Merge pull request #2257 from antmicro/fix-conflictsclairexen2020-07-155-9/+59
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| * | | | | Add missing semicolonsKamil Rakoczy2020-07-151-5/+5
| * | | | | Fix S/R conflictsKamil Rakoczy2020-07-101-1/+2
| * | | | | Fix R/R conflictsKamil Rakoczy2020-07-101-10/+1
| * | | | | Revert "Revert PRs #2203 and #2244."Kamil Rakoczy2020-07-105-10/+68
* | | | | | opt_merge: Dedup one more use of FF cell type list.Marcelina Kościelnicka2020-07-151-3/+1
* | | | | | achronix: Use dfflegalize.Marcelina Kościelnicka2020-07-141-1/+1
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* | | | | intel: Use dfflegalize.Marcelina Kościelnicka2020-07-138-178/+17
* | | | | Revert "intel_alm: direct M10K instantiation"Lofty2020-07-138-128/+38
* | | | | Merge pull request #2263 from whitequark/cxxrtl-capi-eval-commitwhitequark2020-07-132-0/+20
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| * | | | | cxxrtl: expose eval() and commit() via the C API.whitequark2020-07-122-0/+20
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* | | | | xilinx: Fix srl regression.Marcelina Kościelnicka2020-07-122-2/+43
* | | | | proc_dlatch: Remove init values for combinatorial processes.Marcelina Kościelnicka2020-07-121-0/+33
* | | | | dfflegalize: Gather init values from all wires.Marcelina Kościelnicka2020-07-121-1/+1
* | | | | Merge pull request #2256 from YosysHQ/claire/fix2241clairexen2020-07-101-0/+2
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| * | | | Add AST_EDGE support to AstNode::detect_latch(), fixes #2241Claire Wolf2020-07-101-0/+2
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* | | | Merge pull request #2255 from whitequark/bison-Werror-conflictswhitequark2020-07-096-69/+11
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