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Age
Files
Lines
*
Fixed typo in COUNT8 model
Andrew Zonenberg
2017-08-14
1
-2
/
+2
*
Moved GP_POR out of digital cells b/c it has delays
Andrew Zonenberg
2017-08-14
2
-21
/
+21
*
Improved cells_sim_digital model for GP_COUNT8
Andrew Zonenberg
2017-08-14
2
-40
/
+75
*
Refactored GreenPAK4 cells_sim into cells_sim_ams and cells_sim_digital
Andrew Zonenberg
2017-08-14
4
-428
/
+451
*
Add support for set-reset cell variants to opt_rmdff
Clifford Wolf
2017-08-09
1
-0
/
+182
*
Auto-detect JSON front-end
Clifford Wolf
2017-08-09
1
-0
/
+2
*
Add handling of constant reset signals to opt_rmdff
Clifford Wolf
2017-08-06
1
-1
/
+23
*
Add "yosys-smtbmc --smtc-init --smtc-top --noinit"
Clifford Wolf
2017-08-04
1
-20
/
+66
*
Add "-undefined dynamic_lookup" to OSX "yosys-config --ldflags"
Clifford Wolf
2017-08-04
1
-1
/
+5
*
Fix typo in "abc" pass help message
Clifford Wolf
2017-07-29
1
-1
/
+1
*
Add merging of "past FFs" to verific importer
Clifford Wolf
2017-07-29
1
-2
/
+76
*
Add consolidation of init attributes to opt_clean, some opt_clean log fixes
Clifford Wolf
2017-07-29
1
-6
/
+82
*
Add minimal support for PSL in VHDL via Verific
Clifford Wolf
2017-07-28
1
-19
/
+155
*
Add simple VHDL+PSL example
Clifford Wolf
2017-07-28
4
-17
/
+64
*
Improve Verific HDL language options
Clifford Wolf
2017-07-28
1
-4
/
+4
*
Fix handling of non-user-declared Verific netbus
Clifford Wolf
2017-07-28
1
-2
/
+3
*
Improve Verific SVA importer
Clifford Wolf
2017-07-27
2
-7
/
+42
*
Add counter.sv SVA test
Clifford Wolf
2017-07-27
1
-0
/
+29
*
Add log_warning_noprefix() API, Use for Verific warnings and errors
Clifford Wolf
2017-07-27
3
-1
/
+37
*
Add "verific -import -n" and "verific -import -nosva"
Clifford Wolf
2017-07-27
1
-14
/
+36
*
Improve SVA tests, add Makefile and scripts
Clifford Wolf
2017-07-27
11
-9
/
+110
*
Improve Verific SVA import: negedge and $past
Clifford Wolf
2017-07-27
1
-6
/
+49
*
Improve Verific SVA importer
Clifford Wolf
2017-07-27
1
-37
/
+58
*
Add "opt_expr -fine" feature to remove neutral bits from reduce and logic ope...
Clifford Wolf
2017-07-26
1
-0
/
+47
*
Improve Verific bindings (mostly related to SVA)
Clifford Wolf
2017-07-26
1
-110
/
+320
*
Improve "help verific" message
Clifford Wolf
2017-07-25
1
-5
/
+5
*
Add "verific -extnets"
Clifford Wolf
2017-07-25
1
-23
/
+130
*
Add "using std::get" to yosys.h
Clifford Wolf
2017-07-25
1
-0
/
+1
*
Improve "verific -all" handling
Clifford Wolf
2017-07-25
1
-26
/
+45
*
Add "verific -import -d <dump_file"
Clifford Wolf
2017-07-24
1
-6
/
+35
*
Add "verific -import -flatten" and "verific -import -v"
Clifford Wolf
2017-07-24
1
-107
/
+164
*
Add more SVA test cases for future Verific work
Clifford Wolf
2017-07-22
5
-1
/
+74
*
Add "verific -import -k"
Clifford Wolf
2017-07-22
1
-42
/
+51
*
Add error for cell output ports that are connected to constants
Clifford Wolf
2017-07-22
1
-20
/
+21
*
Add some simple SVA test cases for future Verific work
Clifford Wolf
2017-07-22
4
-0
/
+45
*
Improve docs for verific bindings, add simply sby example
Clifford Wolf
2017-07-22
5
-48
/
+89
*
Fix handling of empty cell port assignments (i.e. ignore them)
Clifford Wolf
2017-07-21
2
-0
/
+6
*
Fix "read_blif -wideports" handling of cells with wide ports
Clifford Wolf
2017-07-21
1
-3
/
+33
*
Add a paragraph about pre-defined macros to read_verilog help message
Clifford Wolf
2017-07-21
1
-0
/
+4
*
Add verilator support to testbenches generated by yosys-smtbmc
Clifford Wolf
2017-07-21
1
-3
/
+15
*
Change intptr_t to uintptr_t in hashlib.h
Clifford Wolf
2017-07-18
1
-1
/
+1
*
Merge pull request #363 from rqou/master
Clifford Wolf
2017-07-18
2
-1
/
+6
|
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*
makefile: Add the option to use libtermcap
Robert Ou
2017-07-17
1
-0
/
+5
|
*
Fix build warnings for win64
Robert Ou
2017-07-17
1
-1
/
+1
|
/
*
Add $alu to list of supported cells for "stat -width"
Clifford Wolf
2017-07-14
1
-1
/
+1
*
Generate FSM-style testbenches in smtbmc
Clifford Wolf
2017-07-12
1
-5
/
+23
*
Fix the fixed handling of x-bits in EDIF back-end
Clifford Wolf
2017-07-11
1
-1
/
+0
*
Fix handling of x-bits in EDIF back-end
Clifford Wolf
2017-07-11
1
-1
/
+11
*
Add attributes and parameter support to JSON front-end
Clifford Wolf
2017-07-10
2
-7
/
+52
*
Add techlibs/xilinx/lut2lut.v
Clifford Wolf
2017-07-10
2
-0
/
+66
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