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* ast, rpc: record original name of $paramod\* as \hdlname attribute.whitequark2020-04-183-11/+7
* Merge pull request #1954 from YosysHQ/dave/fix-stdout-conflictwhitequark2020-04-171-3/+3
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| * qbfsat: Fix illegal use of 'stdout' identifierDavid Shah2020-04-171-3/+3
* | Merge pull request #1951 from whitequark/rtlil-string_attributewhitequark2020-04-172-19/+33
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| * rtlil: add AttrObject::has_attribute.whitequark2020-04-162-0/+7
| * rtlil: add AttrObject::{get,set}_string_attribute.whitequark2020-04-162-19/+26
* | Merge pull request #1898 from boqwxp/locationswhitequark2020-04-171-0/+3
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| * | Add location information to `AST_CONSTANT` nodes.Alberto Gonzalez2020-04-161-0/+3
* | | Merge pull request #1864 from boqwxp/cleanup_techmap_abcwhitequark2020-04-171-99/+80
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| * | | Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` cons...Alberto Gonzalez2020-04-141-132/+49
| * | | Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`.Alberto Gonzalez2020-04-051-99/+163
* | | | Merge pull request #1888 from boqwxp/cleanup_scatterwhitequark2020-04-171-17/+11
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| * | | | Replace `std::map` with `dict`.Alberto Gonzalez2020-04-161-2/+2
| * | | | Replace pseudo-private member access to `connections_` in `passes/cmds/scatte...Alberto Gonzalez2020-04-161-13/+10
| * | | | Clean up `passes/cmds/scatter.cc`.Alberto Gonzalez2020-04-161-10/+7
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* | | | Merge pull request #1882 from boqwxp/cleanup_renamewhitequark2020-04-171-119/+103
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| * | | | Use `dict` instead of `std::map`.Alberto Gonzalez2020-04-161-9/+9
| * | | | Revert to `stringf()` rather than stringstreams.Alberto Gonzalez2020-04-161-12/+8
| * | | | Clean up pseudo-private member usage in `passes/cmds/rename.cc`.Alberto Gonzalez2020-04-161-119/+107
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* | | | Merge pull request #1929 from YosysHQ/eddie/select_unsetwhitequark2020-04-164-3/+43
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| * | | tests: add select -unset testsEddie Hung2020-04-162-0/+20
| * | | select: add select -unset optionEddie Hung2020-04-162-3/+23
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* | | Merge pull request #1947 from whitequark/cxxrtl-usabilitywhitequark2020-04-162-10/+19
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| * | cxxrtl: make ROMs writable, document memory::operator[].whitequark2020-04-162-4/+6
| * | cxxrtl: fix misleading example, caution about race conditions.whitequark2020-04-161-4/+13
| * | cxxrtl: remove inaccurate comment. NFC.whitequark2020-04-161-2/+0
* | | Merge pull request #1928 from YosysHQ/eddie/design_deleteEddie Hung2020-04-164-1/+40
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| * | | tests: add design -delete testsEddie Hung2020-04-162-0/+18
| * | | kernel: add design -delete optionEddie Hung2020-04-162-1/+22
* | | | Merge pull request #1896 from boqwxp/read_stdin_replwhitequark2020-04-161-3/+4
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| * | | | Use script-style heredoc syntax for REPL heredocs.Alberto Gonzalez2020-04-151-7/+7
| * | | | Allow reading file input from stdin, improving REPL experience.Alberto Gonzalez2020-04-151-6/+7
* | | | | Merge pull request #1797 from epfl-vlsc/firrtl_backend_fileinfoClaire Wolf2020-04-161-29/+51
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| * | | | | Fix indentationSahand Kashani2020-04-091-3/+3
| * | | | | Remove dependency on ilang backend since we no longer use itSahand Kashani2020-04-081-1/+0
| * | | | | Merge branch 'master' of github.com:YosysHQ/yosys into firrtl_backend_fileinfoSahand Kashani2020-04-08228-7017/+9036
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| * | | | | | Remove unnecessary pruning of double-quotingSahand Kashani2020-04-081-5/+0
| * | | | | | Remove use of auto for simple types + simplify src attribute computationSahand Kashani2020-03-241-10/+5
| * | | | | | Refactor to directly call ILANG_BACKEND::dump_const() + directly lookup src a...Sahand Kashani2020-03-241-68/+15
| * | | | | | Indentation conventionsSahand Kashani2020-03-231-5/+6
| * | | | | | Const parameter in function (backends/firrtl/firrtl.cc)Sahand Kashani-Akhavan2020-03-231-1/+1
| * | | | | | Strip quotes around fileinfo stringsSahand Kashani2020-03-211-1/+5
| * | | | | | Add fileinfo to firrtl backend for assignments and non-instance cellsSahand Kashani2020-03-211-21/+30
| * | | | | | Refactor fileinfo emission characters to single locationSahand Kashani2020-03-201-6/+8
| * | | | | | Add fileinfo to firrtl backend for instancesSahand Kashani2020-03-191-2/+3
| * | | | | | Add fileinfo to firrtl backend for modules and wiresSahand Kashani2020-03-191-12/+20
| * | | | | | Add fileinfo to firrtl backend for top-level circuitSahand Kashani2020-03-191-1/+62
* | | | | | | ecp5: Force SIGNED ports to be 1 bitDavid Shah2020-04-161-1/+1
* | | | | | | Merge pull request #1927 from YosysHQ/eddie/design_remove_assertEddie Hung2020-04-162-1/+2
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| * | | | | | design: do not delete when iterating over Design::modules() directlyEddie Hung2020-04-141-1/+1
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