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* Bump versionYosys Bot2021-01-251-1/+1
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* Merge pull request #2558 from YosysHQ/dave/chandle-dpiClaire Xen2021-01-241-1/+16
|\ | | | | dpi: Support for chandle type
| * dpi: Support for chandle typeDavid Shah2021-01-231-1/+16
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* Bump versionYosys Bot2021-01-221-1/+1
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* Merge pull request #2553 from zachjs/rand-const-modifiersMiodrag Milanović2021-01-213-2/+19
|\ | | | | Allow combination of rand and const modifiers
| * Allow combination of rand and const modifiersZachary Snow2021-01-213-2/+19
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* Bump versionYosys Bot2021-01-211-1/+1
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* Merge pull request #2552 from YosysHQ/claire/yosyshqClaire Xen2021-01-211-18/+18
|\ | | | | Switch verific bindings from Symbiotic EDA flavored Verific to YosysHQ flavored Verific
| * Switch verific bindings from Symbiotic EDA flavored Verific to YosysHQ ↵Claire Xenia Wolf2021-01-201-18/+18
|/ | | | | | flavored Verific Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
* Merge pull request #2536 from TobiasFaller/masterMiodrag Milanović2021-01-201-0/+1
|\ | | | | Fixed missing goto statement in passes/techmap/abc.cc
| * Fixed missing goto statement in passes/techmap/abc.ccTobias Faller2021-01-121-0/+1
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* | Merge pull request #2551 from zachjs/wire-logicMiodrag Milanović2021-01-203-9/+65
|\ \ | | | | | | sv: fix support wire and var data type modifiers
| * | sv: fix support wire and var data type modifiersZachary Snow2021-01-203-9/+65
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* | Bump versionYosys Bot2021-01-191-1/+1
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* | Merge pull request #2547 from zachjs/plugin-so-dsymwhitequark2021-01-181-0/+1
|\ \ | | | | | | Add plugin.so.dSYM to .gitignore
| * | Add plugin.so.dSYM to .gitignoreZachary Snow2021-01-181-0/+1
| | | | | | | | | | | | | | | This artifact is automatically generated by the builtin clang on macOS when -g is used.
* | | Merge pull request #2312 from antmicro/typedef-inoutwhitequark2021-01-184-30/+152
|\ \ \ | |/ / |/| | Add support for user types in IOs
| * | Add typedef input/output testKamil Rakoczy2021-01-182-0/+117
| | | | | | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * | Fix input/output attributes when resolving typedef of wireKamil Rakoczy2021-01-181-0/+3
| | | | | | | | | | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
| * | Parse package user type in module port listLukasz Dalek2021-01-181-30/+32
|/ / | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
* | Bump versionYosys Bot2021-01-151-1/+1
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* | opt_share: Fix X and CO signal width for shifted $alu in opt_share.Marcelina Kościelnicka2021-01-142-2/+22
| | | | | | | | | | | | These need to be the same length as actual Y, not visible part of Y. Fixes #2538.
* | Bump versionYosys Bot2021-01-141-1/+1
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* | Merge pull request #2537 from pepijndevos/spiceClaire Xen2021-01-131-7/+15
|\ \ | |/ |/| Add buffer option to spice backend
| * add buffer option to spice backendPepijn de Vos2021-01-131-7/+15
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* Bump versionYosys Bot2021-01-051-1/+1
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* Merge pull request #2522 from tomverbeure/simlib_typos2whitequark2021-01-041-5/+5
|\ | | | | Fix some trivial typos.
| * Fix some trivial typos.Tom Verbeure2021-01-031-5/+5
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* Bump versionYosys Bot2021-01-021-1/+1
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* Merge pull request #2480 from YosysHQ/dave/nexus-lramwhitequark2021-01-015-1/+227
|\ | | | | nexus: Add LRAM inference
| * nexus: Add LRAM inferenceDavid Shah2020-12-075-1/+227
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #2512 from umarcor/plugin-errwhitequark2021-01-011-1/+5
|\ \ | | | | | | plugin: enhance no-plugin error
| * | plugin: enhance no-plugin errorumarcor2020-12-291-1/+5
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* | | Merge pull request #2515 from umarcor/fix/ghdlwhitequark2021-01-011-2/+2
|\ \ \ | | | | | | | | makefile: fix GHDL vars, replace GHDL_DIR with GHDL_PREFIX
| * | | makefile: fix GHDL vars, replace GHDL_DIR with GHDL_PREFIXumarcor2020-12-301-2/+2
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* | | | Merge pull request #2518 from zachjs/recursionwhitequark2021-01-014-8/+99
|\ \ \ \ | | | | | | | | | | verilog: improved support for recursive functions
| * | | | verilog: improved support for recursive functionsZachary Snow2020-12-314-8/+99
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* | | | Merge pull request #2517 from zachjs/sv-tf-implied-directionwhitequark2021-01-013-0/+39
|\ \ \ \ | |/ / / |/| | | sv: complete support for implied task/function port directions
| * | | sv: complete support for implied task/function port directionsZachary Snow2020-12-313-0/+39
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* / / Bump versionYosys Bot2020-12-301-1/+1
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* | Merge pull request #2509 from zachjs/issue-2427whitequark2020-12-294-1/+56
|\ \ | | | | | | Fix elaboration of whole memory words used as indices
| * | Fix elaboration of whole memory words used as indicesZachary Snow2020-12-264-1/+56
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* | | Merge pull request #2514 from umarcor/feat/ghdlwhitequark2020-12-291-0/+9
|\ \ \ | | | | | | | | makefile: add support for built-in ghdl-yosys-plugin
| * | | makefile: add support for built-in ghdl-yosys-pluginumarcor2020-12-281-0/+9
| | | | | | | | | | | | | | | | | | | | Co-authored-by: Tristan Gingold <tgingold@free.fr> Co-authored-by: whitequark <whitequark@whitequark.org>
* | | | Bump versionYosys Bot2020-12-291-1/+1
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* | | Merge pull request #2511 from umarcor/feat/msys2-32whitequark2020-12-281-5/+7
|\ \ \ | | | | | | | | Update MSYS2 build system
| * | | makefile: rename msys2 to msys2-32, config PREFIXumarcor2020-12-281-5/+7
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* | | | Merge pull request #2507 from umarcor/fix/msys2whitequark2020-12-281-2/+3
|\| | | | | | | | | | | kernel/yosys.h: undef CONST on WIN32
| * | | kernel/yosys.h: undef CONST on WIN32umarcor2020-12-281-2/+3
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* | | Bump versionYosys Bot2020-12-281-1/+1
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