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* | Do not share any $reduce_* cells (its complicated and not worth it anyways)Clifford Wolf2014-08-091-19/+0
* | Some improvements in fsm_opt and fsm_map for FSM with unreachable statesClifford Wolf2014-08-093-51/+103
* | Improved FSM testsClifford Wolf2014-08-084-2/+5
* | Another fsm_extract bugfixClifford Wolf2014-08-081-0/+4
* | Fixed "fsm -export"Clifford Wolf2014-08-082-6/+5
* | Fixed sharing of reduce operatorClifford Wolf2014-08-081-0/+13
* | Fixed fsm_extract for wreduced muxesClifford Wolf2014-08-081-8/+25
* | Added FSM test benchClifford Wolf2014-08-082-0/+113
* | Added "sat -prove-skip"Clifford Wolf2014-08-081-2/+16
* | Fixed build with gcc-4.6Clifford Wolf2014-08-076-16/+24
* | Use "-keepdc" in "miter -equiv -flatten"Clifford Wolf2014-08-071-2/+2
* | Also allow "module foobar(input foo, output bar, ...);" syntaxClifford Wolf2014-08-071-3/+5
* | Added adff2dff.v (for techmap -share_map)Clifford Wolf2014-08-072-1/+32
* | Added AST_MULTIRANGE (arrays with more than 1 dimension)Clifford Wolf2014-08-065-6/+80
* | Various improvements in memory_dff passClifford Wolf2014-08-061-21/+22
* | Various fixes and improvements in wreduce passClifford Wolf2014-08-051-29/+47
* | Removed old "constmap" from wreduce codeClifford Wolf2014-08-051-3/+2
* | Added support for truncating of wires to wreduce passClifford Wolf2014-08-054-12/+93
* | Cleanups and improvements in wreduce passClifford Wolf2014-08-051-47/+77
* | Added mux support to wreduce commandClifford Wolf2014-08-051-36/+82
* | Improved scope resolution of local regs in Verilog+AST frontendClifford Wolf2014-08-054-9/+90
* | Fixed AST handling of variables declared inside a functions main blockClifford Wolf2014-08-052-3/+16
* | Added "show -signed"Clifford Wolf2014-08-041-5/+17
* | Added support for non-standard "module mod_name(...);" syntaxClifford Wolf2014-08-042-1/+12
* | Added RTLIL::IdString::in(...)Clifford Wolf2014-08-042-9/+21
* | Fixed "share" for memory read portsClifford Wolf2014-08-031-0/+7
* | Added "wreduce" to some of the standard test benchesClifford Wolf2014-08-033-2/+3
* | Progress in "wreduce" passClifford Wolf2014-08-031-43/+16
* | Added "wreduce" command (work in progress)Clifford Wolf2014-08-032-0/+253
* | Added query() API to ModIndexClifford Wolf2014-08-031-8/+46
* | Added ID() macro for static IdStringsClifford Wolf2014-08-031-0/+3
* | Implemented recursive techmapClifford Wolf2014-08-032-17/+63
* | Fixes in show command (related to new IdString)Clifford Wolf2014-08-031-20/+18
* | Implemented simplemap support for "techmap -extern"Clifford Wolf2014-08-021-5/+40
* | Fixed a va_list corruption in logv_error()Clifford Wolf2014-08-021-4/+3
* | Be more conservative with printing decimal numbers in verilog backendClifford Wolf2014-08-021-2/+3
* | Improved verilog output for ordinary $mux cellsClifford Wolf2014-08-021-3/+19
* | Bugfix in "techmap -extern"Clifford Wolf2014-08-022-10/+17
* | Removed at() method from RTLIL::IdStringClifford Wolf2014-08-023-8/+7
* | No implicit conversion from IdString to anything elseClifford Wolf2014-08-0216-37/+37
* | More bugfixes related to new RTLIL::IdStringClifford Wolf2014-08-0210-44/+60
* | Limit size of log_signal buffer to 100 elementsClifford Wolf2014-08-022-2/+9
* | Improvements in new RTLIL::IdString implementationClifford Wolf2014-08-025-33/+65
* | Fixed a performance bug in opt_reduceClifford Wolf2014-08-021-2/+6
* | Implemented new reference counting RTLIL::IdStringClifford Wolf2014-08-022-15/+90
* | Fixed memory corruption related to id2cstr()Clifford Wolf2014-08-021-2/+2
* | More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-0233-261/+237
* | Preparations for RTLIL::IdString redesign: cleanup of existing codeClifford Wolf2014-08-0212-32/+71
* | Added logfile hash to statistics footerClifford Wolf2014-08-015-45/+79
* | Replaced sha1 implementationClifford Wolf2014-08-018-283/+334
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