| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | | | | Merge pull request #1168 from whitequark/bugpoint-processes | Clifford Wolf | 2019-07-09 | 2 | -17/+105 | |
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| | | * | | | | | | bugpoint: add -assigns and -updates options. | whitequark | 2019-07-09 | 1 | -9/+81 | |
| | | * | | | | | | proc_clean: add -quiet option. | whitequark | 2019-07-09 | 1 | -8/+24 | |
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| | * | | | | | | Merge pull request #1169 from whitequark/more-proc-cleanups | Clifford Wolf | 2019-07-09 | 5 | -22/+168 | |
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| | | * | | | | | | proc_prune: promote assigns to module connections when legal. | whitequark | 2019-07-09 | 3 | -33/+42 | |
| | | * | | | | | | proc_prune: new pass. | whitequark | 2019-07-09 | 3 | -1/+138 | |
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| | * | | | | | | Merge pull request #1163 from whitequark/more-case-attrs | Clifford Wolf | 2019-07-09 | 3 | -16/+28 | |
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| | | * | | | | | | verilog_backend: dump attributes on SwitchRule. | whitequark | 2019-07-08 | 1 | -0/+1 | |
| | | * | | | | | | proc_mux: consider \src attribute on CaseRule. | whitequark | 2019-07-08 | 1 | -10/+16 | |
| | | * | | | | | | verilog_backend: dump attributes on CaseRule, as comments. | whitequark | 2019-07-08 | 1 | -6/+10 | |
| | | * | | | | | | genrtlil: emit \src attribute on CaseRule. | whitequark | 2019-07-08 | 1 | -0/+1 | |
| | * | | | | | | | Merge pull request #1162 from whitequark/rtlil-case-attrs | Clifford Wolf | 2019-07-09 | 3 | -5/+15 | |
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| | | * | | | | | | Allow attributes on individual switch cases in RTLIL. | whitequark | 2019-07-08 | 3 | -5/+15 | |
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| | * | | | | | | Merge pull request #1167 from YosysHQ/eddie/xc7srl_cleanup | Clifford Wolf | 2019-07-09 | 1 | -19/+25 | |
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| | | * \ \ \ \ \ | Merge branch 'eddie/script_from_wire' into eddie/xc7srl_cleanup | Eddie Hung | 2019-07-02 | 6 | -15/+20 | |
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| | | * | | | | | | | Cleanup SRL inference/make more consistent | Eddie Hung | 2019-06-29 | 1 | -19/+25 | |
| | * | | | | | | | | Merge pull request #1166 from YosysHQ/eddie/synth_keepdc | Eddie Hung | 2019-07-08 | 3 | -3/+15 | |
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| | | * | | | | | | Add synth -keepdc to CHANGELOG | Eddie Hung | 2019-07-08 | 1 | -0/+1 | |
| | | * | | | | | | Clarify 'wreduce -keepdc' doc | Eddie Hung | 2019-07-08 | 1 | -1/+1 | |
| | | * | | | | | | Add synth -keepdc option | Eddie Hung | 2019-07-08 | 1 | -2/+13 | |
| | * | | | | | | | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-07-08 | 2 | -8/+22 | |
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| | | * | | | | | | | Merge pull request #1164 from YosysHQ/eddie/muxcover_mux2 | Eddie Hung | 2019-07-08 | 1 | -8/+19 | |
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| | | | * | | | | | | Update muxcover doc as per @ZirconiumX | Eddie Hung | 2019-07-08 | 1 | -5/+10 | |
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| | | | * | | | | | atoi -> stoi | Eddie Hung | 2019-07-08 | 1 | -5/+5 | |
| | | | * | | | | | Add muxcover -mux2=cost option | Eddie Hung | 2019-07-08 | 1 | -1/+7 | |
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| | | * | | | | | Merge pull request #1160 from ZirconiumX/cyclone_v | David Shah | 2019-07-08 | 1 | -0/+3 | |
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| | | | * | | | | synth_intel: Warn about untested Quartus backend | Dan Ravensloft | 2019-07-07 | 1 | -0/+3 | |
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| | * / / / / | Clarify script -scriptwire doc | Eddie Hung | 2019-07-08 | 1 | -0/+4 | |
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| | * | | | | Merge pull request #1159 from btut/fix/1090_segfault_cell_and_wire | Clifford Wolf | 2019-07-05 | 1 | -0/+3 | |
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| | | * | | | | Throw runtime exception when trying to convert a c++-pointer to a | Benedikt Tutzer | 2019-07-04 | 1 | -0/+3 | |
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| | * | | | | Merge pull request #1156 from YosysHQ/eddie/fix_abc9_unknown_cell | Eddie Hung | 2019-07-03 | 3 | -6/+28 | |
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| | | * | | | | write_xaiger to treat unknown cell connections as keep-s | Eddie Hung | 2019-07-02 | 1 | -6/+14 | |
| | | * | | | | Add test | Eddie Hung | 2019-07-02 | 2 | -0/+14 | |
| | * | | | | | Merge pull request #1147 from YosysHQ/clifford/fix1144 | Clifford Wolf | 2019-07-03 | 3 | -82/+26 | |
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| | | * | | | | | Fix tests/various/specify.v | Clifford Wolf | 2019-07-03 | 2 | -8/+3 | |
| | | * | | | | | Some cleanups in "ignore specify parser" | Clifford Wolf | 2019-07-03 | 2 | -80/+6 | |
| | | * | | | | | Comment out invalid syntax | Eddie Hung | 2019-06-30 | 1 | -2/+2 | |
| | | * | | | | | Add test from #1144, and try reading without '-specify' flag | Eddie Hung | 2019-06-28 | 2 | -0/+16 | |
| | | * | | | | | Improve specify dummy parser, fixes #1144 | Clifford Wolf | 2019-06-28 | 1 | -2/+9 | |
| | * | | | | | | Merge pull request #1154 from whitequark/manual-sync-always | Clifford Wolf | 2019-07-03 | 1 | -2/+3 | |
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| | | * | | | | | | manual: explain the purpose of `sync always`. | whitequark | 2019-07-02 | 1 | -2/+3 | |
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| * | | | | | | | xc7: Map combinational DSP48E1s | David Shah | 2019-07-08 | 4 | -7/+77 | |
| * | | | | | | | mul2dsp: Fix typo | David Shah | 2019-07-08 | 1 | -1/+1 | |
| * | | | | | | | Add mul2dsp multiplier splitting rule and ECP5 mapping | David Shah | 2019-07-08 | 5 | -2/+280 | |
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| * | | | | | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-07-02 | 4 | -3/+27 | |
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| | * | | | | | Merge pull request #1150 from YosysHQ/eddie/script_from_wire | Eddie Hung | 2019-07-02 | 3 | -8/+60 | |
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| | * | | | | Merge pull request #1153 from YosysHQ/dave/fix_multi_mux | David Shah | 2019-07-02 | 3 | -3/+25 | |
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| | | * | | | | memory_dff: Fix checking of feedback mux input when more than one mux | David Shah | 2019-07-02 | 3 | -3/+25 | |
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| | * | | | | Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/Symbi... | Clifford Wolf | 2019-07-02 | 1 | -0/+2 | |
| * | | | | | Merge remote-tracking branch 'origin/eddie/script_from_wire' into xc7mux | Eddie Hung | 2019-07-02 | 3 | -10/+13 | |
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