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Diffstat (limited to 'tests/ice40/adffs.ys')
| -rw-r--r-- | tests/ice40/adffs.ys | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/tests/ice40/adffs.ys b/tests/ice40/adffs.ys deleted file mode 100644 index 548060b66..000000000 --- a/tests/ice40/adffs.ys +++ /dev/null @@ -1,11 +0,0 @@ -read_verilog adffs.v -proc -flatten -equiv_opt -multiclock -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check -design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) -cd top # Constrain all select calls below inside the top module -select -assert-count 1 t:SB_DFFNS -select -assert-count 2 t:SB_DFFR -select -assert-count 1 t:SB_DFFS -select -assert-count 2 t:SB_LUT4 -select -assert-none t:SB_DFFNS t:SB_DFFR t:SB_DFFS t:SB_LUT4 %% t:* %D |