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-rw-r--r--tests/arch/machxo2/dffs.ys10
1 files changed, 10 insertions, 0 deletions
diff --git a/tests/arch/machxo2/dffs.ys b/tests/arch/machxo2/dffs.ys
new file mode 100644
index 000000000..3e9f87fec
--- /dev/null
+++ b/tests/arch/machxo2/dffs.ys
@@ -0,0 +1,10 @@
+read_verilog ../common/dffs.v
+design -save read
+
+hierarchy -top dff
+proc
+equiv_opt -assert -map +/machxo2/cells_sim.v synth_machxo2 # equivalency check
+design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
+cd dff # Constrain all select calls below inside the top module
+select -assert-count 1 t:FACADE_FF
+select -assert-none t:FACADE_FF %% t:* %D