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-rw-r--r--techlibs/common/synth.cc23
1 files changed, 20 insertions, 3 deletions
diff --git a/techlibs/common/synth.cc b/techlibs/common/synth.cc
index c3e7288db..f6853651e 100644
--- a/techlibs/common/synth.cc
+++ b/techlibs/common/synth.cc
@@ -58,6 +58,13 @@ struct SynthPass : public Pass {
log(" -noabc\n");
log(" do not run abc (as if yosys was compiled without ABC support)\n");
log("\n");
+ log(" -noalumacc\n");
+ log(" do not run 'alumacc' pass. i.e. keep arithmetic operators in\n");
+ log(" their direct form ($add, $sub, etc.).\n");
+ log("\n");
+ log(" -nordff\n");
+ log(" passed to 'memory'. prohibits merging of FFs into memory read ports\n");
+ log("\n");
log(" -run <from_label>[:<to_label>]\n");
log(" only run the commands between the labels (see below). an empty\n");
log(" from label is synonymous to 'begin', and empty to label is\n");
@@ -102,8 +109,9 @@ struct SynthPass : public Pass {
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{
- std::string top_module, fsm_opts;
+ std::string top_module, fsm_opts, memory_opts;
std::string run_from, run_to;
+ bool noalumacc = false;
bool noabc = false;
size_t argidx;
@@ -132,6 +140,14 @@ struct SynthPass : public Pass {
noabc = true;
continue;
}
+ if (args[argidx] == "-noalumacc") {
+ noalumacc = true;
+ continue;
+ }
+ if (args[argidx] == "-nordff") {
+ memory_opts += " -nordff";
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
@@ -159,12 +175,13 @@ struct SynthPass : public Pass {
Pass::call(design, "check");
Pass::call(design, "opt");
Pass::call(design, "wreduce");
- Pass::call(design, "alumacc");
+ if (!noalumacc)
+ Pass::call(design, "alumacc");
Pass::call(design, "share");
Pass::call(design, "opt");
Pass::call(design, "fsm" + fsm_opts);
Pass::call(design, "opt -fast");
- Pass::call(design, "memory -nomap");
+ Pass::call(design, "memory -nomap" + memory_opts);
Pass::call(design, "opt_clean");
}