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-rw-r--r--techlibs/ecp5/cells_sim.v15
1 files changed, 10 insertions, 5 deletions
diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v
index 2fcb0369e..dc8334acb 100644
--- a/techlibs/ecp5/cells_sim.v
+++ b/techlibs/ecp5/cells_sim.v
@@ -17,10 +17,12 @@ endmodule
// ---------------------------------------
(* abc_box_id=1, lib_whitebox *)
module CCU2C(
- (* abc_carry *) input CIN,
+ (* abc_carry *)
+ input CIN,
input A0, B0, C0, D0, A1, B1, C1, D1,
output S0, S1,
- (* abc_carry *) output COUT
+ (* abc_carry *)
+ output COUT
);
parameter [15:0] INIT0 = 16'h0000;
parameter [15:0] INIT1 = 16'h0000;
@@ -109,9 +111,12 @@ endmodule
// ---------------------------------------
//(* abc_box_id=2 *)
module TRELLIS_DPR16X4 (
- (* abc_scc_break *) input [3:0] DI,
- (* abc_scc_break *) input [3:0] WAD,
- (* abc_scc_break *) input WRE,
+ (* abc_scc_break *)
+ input [3:0] DI,
+ (* abc_scc_break *)
+ input [3:0] WAD,
+ (* abc_scc_break *)
+ input WRE,
input WCK,
input [3:0] RAD,
output [3:0] DO