1 files changed, 1 insertions, 2 deletions
diff --git a/techlibs/achronix/speedster22i/cells_sim.v b/techlibs/achronix/speedster22i/cells_sim.v
index 6c87adb94..fc15e0966 100644
--- a/techlibs/achronix/speedster22i/cells_sim.v
+++ b/techlibs/achronix/speedster22i/cells_sim.v
@@ -68,9 +68,8 @@ end
 assign dout = combout_rt & 1'b1;
 endmodule
 
-module DFF (output q,
+module DFF (output reg q,
             input  d, ck);
-   reg             q;
    always @(posedge ck)
      q <= d;