diff options
Diffstat (limited to 'passes/sat')
| -rw-r--r-- | passes/sat/sim.cc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index c669247e8..9771e83f3 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -1099,6 +1099,8 @@ struct SimWorker : SimShared std::string type, symbol; int variable, index; dict<int, std::pair<SigBit,bool>> inputs, inits, latches; + if (mf.fail()) + log_cmd_error("Not able to read AIGER witness map file.\n"); while (mf >> type >> variable >> index >> symbol) { RTLIL::IdString escaped_s = RTLIL::escape_id(symbol); Wire *w = topmod->wire(escaped_s); @@ -1410,9 +1412,14 @@ struct AIWWriter : public OutputWriter void write(std::map<int, bool> &) override { if (!aiwfile.is_open()) return; + if (worker->map_filename.empty()) + log_cmd_error("For AIGER witness file map parameter is mandatory.\n"); + std::ifstream mf(worker->map_filename); std::string type, symbol; int variable, index; + if (mf.fail()) + log_cmd_error("Not able to read AIGER witness map file.\n"); while (mf >> type >> variable >> index >> symbol) { RTLIL::IdString escaped_s = RTLIL::escape_id(symbol); Wire *w = worker->top->module->wire(escaped_s); |