diff options
| -rw-r--r-- | examples/cmos/.gitignore | 4 | ||||
| -rw-r--r-- | examples/cmos/README | 9 | ||||
| -rw-r--r-- | examples/cmos/counter_tb.gtkw | 5 | ||||
| -rw-r--r-- | examples/cmos/testbench.sh | 3 | ||||
| -rw-r--r-- | examples/cmos/testbench_digital.sh | 10 |
5 files changed, 19 insertions, 12 deletions
diff --git a/examples/cmos/.gitignore b/examples/cmos/.gitignore new file mode 100644 index 000000000..f58d95018 --- /dev/null +++ b/examples/cmos/.gitignore @@ -0,0 +1,4 @@ +counter_tb +counter_tb.vcd +synth.sp +synth.v diff --git a/examples/cmos/README b/examples/cmos/README index a7b777595..c459b4b54 100644 --- a/examples/cmos/README +++ b/examples/cmos/README @@ -1,7 +1,7 @@ -In this directory you will find out, how to generate a spice output -operating in two modes, analog or event-driven mode supported by ngspice -xspice sub-module. +In this directory contains an example for generating a spice output using two +different spice modes, normal analog transient simulation and event-driven +digital simulation as supported by ngspice xspice sub-module. Each test bench can be run separately by either running: @@ -9,4 +9,5 @@ Each test bench can be run separately by either running: - testbench_digital.sh for mixed-signal digital simulation. The later case also includes pure verilog simulation using the iverilog -and gtkwave to represent the results. +and gtkwave for comparison. + diff --git a/examples/cmos/counter_tb.gtkw b/examples/cmos/counter_tb.gtkw new file mode 100644 index 000000000..4a2eac400 --- /dev/null +++ b/examples/cmos/counter_tb.gtkw @@ -0,0 +1,5 @@ +[dumpfile] "counter_tb.vcd" +counter_tb.clk +counter_tb.count[2:0] +counter_tb.en +counter_tb.reset diff --git a/examples/cmos/testbench.sh b/examples/cmos/testbench.sh index e2a203ff5..061704b64 100644 --- a/examples/cmos/testbench.sh +++ b/examples/cmos/testbench.sh @@ -5,6 +5,3 @@ set -ex ../../yosys counter.ys ngspice testbench.sp -# requires ngspice with xspice support enabled: -#ngspice testbench_digital.sp - diff --git a/examples/cmos/testbench_digital.sh b/examples/cmos/testbench_digital.sh index 5836c97a6..afaaf4d43 100644 --- a/examples/cmos/testbench_digital.sh +++ b/examples/cmos/testbench_digital.sh @@ -1,15 +1,15 @@ #!/bin/bash +set -ex + # iverlog simulation echo "Doing Verilog simulation with iverilog" -iverilog -o dsn counter.v counter_tb.v -./dsn -lxt2 -gtkwave counter_tb.vcd & +iverilog -o counter_tb counter.v counter_tb.v +./counter_tb; gtkwave counter_tb.gtkw & # yosys synthesis -set -ex - ../../yosys counter_digital.ys # requires ngspice with xspice support enabled: ngspice testbench_digital.sp + |