diff options
| -rw-r--r-- | tests/xilinx_ug901/dynamic_shift_registers_1.ys | 2 | ||||
| -rw-r--r-- | tests/xilinx_ug901/shift_registers_0.ys | 1 | ||||
| -rw-r--r-- | tests/xilinx_ug901/shift_registers_1.ys | 2 |
3 files changed, 3 insertions, 2 deletions
diff --git a/tests/xilinx_ug901/dynamic_shift_registers_1.ys b/tests/xilinx_ug901/dynamic_shift_registers_1.ys index 994e12a3e..f70c84f2f 100644 --- a/tests/xilinx_ug901/dynamic_shift_registers_1.ys +++ b/tests/xilinx_ug901/dynamic_shift_registers_1.ys @@ -2,7 +2,7 @@ read_verilog dynamic_shift_registers_1.v hierarchy -top dynamic_shift_register_1 proc flatten - +#ERROR: Found 1 unproven $equiv cells in 'equiv_status -assert'. #equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check diff --git a/tests/xilinx_ug901/shift_registers_0.ys b/tests/xilinx_ug901/shift_registers_0.ys index ae7d23a7f..89da1d7cc 100644 --- a/tests/xilinx_ug901/shift_registers_0.ys +++ b/tests/xilinx_ug901/shift_registers_0.ys @@ -2,6 +2,7 @@ read_verilog shift_registers_0.v hierarchy -top shift_registers_0 proc flatten +#ERROR: Found 2 unproven $equiv cells in 'equiv_status -assert'. #equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check diff --git a/tests/xilinx_ug901/shift_registers_1.ys b/tests/xilinx_ug901/shift_registers_1.ys index fb935c446..b53b6cb25 100644 --- a/tests/xilinx_ug901/shift_registers_1.ys +++ b/tests/xilinx_ug901/shift_registers_1.ys @@ -2,7 +2,7 @@ read_verilog shift_registers_1.v hierarchy -top shift_registers_1 proc flatten - +#ERROR: Found 2 unproven $equiv cells in 'equiv_status -assert'. #equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check |