diff options
| -rw-r--r-- | backends/aiger/xaiger.cc | 7 | ||||
| -rwxr-xr-x | tests/simple/run-test.sh | 2 | ||||
| -rwxr-xr-x | tests/simple_abc9/run-test.sh | 2 |
3 files changed, 6 insertions, 5 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index 77d0e94c2..e1b84236d 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -261,11 +261,12 @@ struct XAigerWriter } } else { - bool cell_known = cell->known(); + bool cell_known = inst_module || cell->known(); for (const auto &c : cell->connections()) { if (c.second.is_fully_const()) continue; - auto is_input = !cell_known || cell->input(c.first); - auto is_output = !cell_known || cell->output(c.first); + auto port_wire = inst_module ? inst_module->wire(c.first) : nullptr; + auto is_input = (port_wire && port_wire->port_input) || !cell_known || cell->input(c.first); + auto is_output = (port_wire && port_wire->port_output) || !cell_known || cell->output(c.first); if (!is_input && !is_output) log_error("Connection '%s' on cell '%s' (type '%s') not recognised!\n", log_id(c.first), log_id(cell), log_id(cell->type)); diff --git a/tests/simple/run-test.sh b/tests/simple/run-test.sh index 967ac49f2..f20fd0d30 100755 --- a/tests/simple/run-test.sh +++ b/tests/simple/run-test.sh @@ -12,7 +12,7 @@ done shift "$((OPTIND-1))" # check for Icarus Verilog -if ! which iverilog > /dev/null ; then +if ! command -v iverilog > /dev/null ; then echo "$0: Error: Icarus Verilog 'iverilog' not found." exit 1 fi diff --git a/tests/simple_abc9/run-test.sh b/tests/simple_abc9/run-test.sh index 8df6994e3..0d4262005 100755 --- a/tests/simple_abc9/run-test.sh +++ b/tests/simple_abc9/run-test.sh @@ -12,7 +12,7 @@ done shift "$((OPTIND-1))" # check for Icarus Verilog -if ! which iverilog > /dev/null ; then +if ! command -v iverilog > /dev/null ; then echo "$0: Error: Icarus Verilog 'iverilog' not found." exit 1 fi |