diff options
| -rw-r--r-- | passes/pmgen/ice40_dsp.cc | 4 | ||||
| -rw-r--r-- | passes/pmgen/ice40_dsp.pmg | 20 |
2 files changed, 14 insertions, 10 deletions
diff --git a/passes/pmgen/ice40_dsp.cc b/passes/pmgen/ice40_dsp.cc index 66f70399d..6f0539679 100644 --- a/passes/pmgen/ice40_dsp.cc +++ b/passes/pmgen/ice40_dsp.cc @@ -155,9 +155,9 @@ void create_ice40_dsp(ice40_dsp_pm &pm) // If we have a signed multiply-add, then perform sign extension // TODO: Need to check CD[31:16] is sign extension of CD[15:0]? if (st.addAB->getParam("\\A_SIGNED").as_bool() && st.addAB->getParam("\\B_SIGNED").as_bool()) - pm.module->connect(O[-1], O[-2]); + pm.module->connect(O[32], O[31]); else - cell->setPort("\\CO", O[-1]); + cell->setPort("\\CO", O[32]); O.remove(O_width-1); } else diff --git a/passes/pmgen/ice40_dsp.pmg b/passes/pmgen/ice40_dsp.pmg index cda7535f3..d64c8a391 100644 --- a/passes/pmgen/ice40_dsp.pmg +++ b/passes/pmgen/ice40_dsp.pmg @@ -206,10 +206,12 @@ match ffO_lo endmatch code - SigSpec O = sigOused.extract(0,std::min(16,param(ffO_lo, \WIDTH).as_int())); - O.remove_const(); - if (!includes(port(ffO_lo, \D).to_sigbit_set(), O.to_sigbit_set())) - reject; + if (ffO_lo) { + SigSpec O = sigOused.extract(0,std::min(16,param(ffO_lo, \WIDTH).as_int())); + O.remove_const(); + if (!includes(port(ffO_lo, \D).to_sigbit_set(), O.to_sigbit_set())) + reject; + } endcode match ffO_hi @@ -220,10 +222,12 @@ match ffO_hi endmatch code - SigSpec O = sigOused.extract_end(16); - O.remove_const(); - if (!includes(port(ffO_hi, \D).to_sigbit_set(), O.to_sigbit_set())) - reject; + if (ffO_hi) { + SigSpec O = sigOused.extract_end(16); + O.remove_const(); + if (!includes(port(ffO_hi, \D).to_sigbit_set(), O.to_sigbit_set())) + reject; + } endcode code clock clock_pol sigO sigCD |