diff options
-rw-r--r-- | techlibs/xilinx/cells_sim.v | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v index c7f07e400..1f114a22c 100644 --- a/techlibs/xilinx/cells_sim.v +++ b/techlibs/xilinx/cells_sim.v @@ -23,13 +23,13 @@ module BUFG(output O, input I); assign O = I; endmodule -module OBUFT(output O, input I, T); - assign O = T ? 1'bz : I; -endmodule +// module OBUFT(output O, input I, T); +// assign O = T ? 1'bz : I; +// endmodule -module IOBUF(inout IO, output O, input I, T); - assign O = IO, IO = T ? 1'bz : I; -endmodule +// module IOBUF(inout IO, output O, input I, T); +// assign O = IO, IO = T ? 1'bz : I; +// endmodule module INV(output O, input I); assign O = !I; |