diff options
| -rw-r--r-- | techlibs/gowin/cells_map.v | 3 | ||||
| -rw-r--r-- | techlibs/gowin/cells_sim.v | 13 | ||||
| -rw-r--r-- | techlibs/gowin/synth_gowin.cc | 1 |
3 files changed, 0 insertions, 17 deletions
diff --git a/techlibs/gowin/cells_map.v b/techlibs/gowin/cells_map.v index 08eb0a9c3..dc0e16db8 100644 --- a/techlibs/gowin/cells_map.v +++ b/techlibs/gowin/cells_map.v @@ -50,9 +50,6 @@ module \$__DFFE_PP0 (input D, C, R, E, output Q); DFFCE _TECHMAP_REPLACE_ (.D(D module \$__DFFE_PN0 (input D, C, R, E, output Q); DFFCE _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C), .CLEAR(!R), .CE(E)); endmodule -module \$_MUX_ (input A, B, S, output Y); MUX2 _TECHMAP_REPLACE_ (.I0(A), .I1(B), .S0(S), .O(Y)); endmodule -module \$_MUX4_ (input A, B, C, D, S, T, output Y); MUX4 _TECHMAP_REPLACE_ (.I0(A), .I1(B), .I2(C), .I3(D), .S0(S), .S1(T), .O(Y)); endmodule - module \$lut (A, Y); parameter WIDTH = 0; parameter LUT = 0; diff --git a/techlibs/gowin/cells_sim.v b/techlibs/gowin/cells_sim.v index a2f60b99e..b70d1299c 100644 --- a/techlibs/gowin/cells_sim.v +++ b/techlibs/gowin/cells_sim.v @@ -24,19 +24,6 @@ module LUT4(output F, input I0, I1, I2, I3); assign F = I0 ? s1[1] : s1[0]; endmodule -module MUX2 (I0, I1, S0, O); -input I0, I1, S0; -output O; -assign O = S0 ? I1 : I0; -endmodule - -module MUX4 (I0, I1, I2, I3, S0, S1, O); -input I0, I1, I2, I3, S0, S1; -output O; -assign O = S1 ? (S0 ? I3 : I2) : - (S0 ? I1 : I0); -endmodule - module DFF (output reg Q, input CLK, D); parameter [0:0] INIT = 1'b0; initial Q = INIT; diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc index f67627e8a..e93225fab 100644 --- a/techlibs/gowin/synth_gowin.cc +++ b/techlibs/gowin/synth_gowin.cc @@ -196,7 +196,6 @@ struct SynthGowinPass : public ScriptPass run("opt_clean"); if (!nodffe) run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*"); - run("muxcover -mux4"); run("techmap -map +/gowin/cells_map.v"); run("opt_expr -mux_undef"); run("simplemap"); |