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-rw-r--r--frontends/verilog/verilog_parser.y8
-rw-r--r--tests/various/unpacked_arrays.sv4
-rw-r--r--tests/various/unpacked_arrays.ys2
3 files changed, 13 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 8234479cc..4895d0302 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -1400,7 +1400,13 @@ wire_name:
node->children.push_back(rng);
}
node->type = AST_MEMORY;
- node->children.push_back($2);
+ auto *rangeNode = $2;
+ if (rangeNode->type == AST_RANGE && rangeNode->children.size() == 1) {
+ // SV array size [n], rewrite as [n-1:0]
+ rangeNode->children[0] = new AstNode(AST_SUB, rangeNode->children[0], AstNode::mkconst_int(1, true));
+ rangeNode->children.push_back(AstNode::mkconst_int(0, false));
+ }
+ node->children.push_back(rangeNode);
}
if (current_function_or_task == NULL) {
if (do_not_require_port_stubs && (node->is_input || node->is_output) && port_stubs.count(*$1) == 0) {
diff --git a/tests/various/unpacked_arrays.sv b/tests/various/unpacked_arrays.sv
new file mode 100644
index 000000000..2f4ed0d3f
--- /dev/null
+++ b/tests/various/unpacked_arrays.sv
@@ -0,0 +1,4 @@
+module unpacked_arrays;
+ reg array_range [0:7];
+ reg array_size [8];
+endmodule
diff --git a/tests/various/unpacked_arrays.ys b/tests/various/unpacked_arrays.ys
new file mode 100644
index 000000000..419152d9c
--- /dev/null
+++ b/tests/various/unpacked_arrays.ys
@@ -0,0 +1,2 @@
+read_verilog -sv unpacked_arrays.sv
+stat