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authorEddie Hung <eddie@fpgeh.com>2020-05-14 00:59:38 -0700
committerEddie Hung <eddie@fpgeh.com>2020-05-14 00:59:38 -0700
commit5be4b00a0dad4c6fe281a0e925daeae26715f215 (patch)
tree1a2491d7c1885ad384c22176c5b4e6617f9095c3 /tests
parentaa4a69f89be9fcdcf20ca1c28d67444b994ec479 (diff)
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opt_clean: improve warning message
Diffstat (limited to 'tests')
-rw-r--r--tests/opt/opt_clean_init.ys2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/opt/opt_clean_init.ys b/tests/opt/opt_clean_init.ys
index bfc383955..0d567608d 100644
--- a/tests/opt/opt_clean_init.ys
+++ b/tests/opt/opt_clean_init.ys
@@ -1,4 +1,4 @@
-logger -expect warning "Initial value conflict for wire '\\y' and value '1'0'" 1
+logger -expect warning "Initial value conflict for \\y resolving to 1'0 but with init 1'1" 1
logger -expect-no-warnings
read_verilog <<EOT
module top;