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author | Eddie Hung <eddie@fpgeh.com> | 2019-08-09 10:13:49 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-09 10:13:49 -0700 |
commit | 313c9ec8df2aa0cbc077eb6d725e28336e9fe9e4 (patch) | |
tree | ed027f60aef858da9061708bfb45b0ac5293de9e /tests | |
parent | d9c16644626d49b5bb5eb463f2a113e13ad22d69 (diff) | |
download | yosys-313c9ec8df2aa0cbc077eb6d725e28336e9fe9e4.tar.gz yosys-313c9ec8df2aa0cbc077eb6d725e28336e9fe9e4.tar.bz2 yosys-313c9ec8df2aa0cbc077eb6d725e28336e9fe9e4.zip |
Cleanup some more
Diffstat (limited to 'tests')
-rw-r--r-- | tests/opt/opt_expr.ys | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/tests/opt/opt_expr.ys b/tests/opt/opt_expr.ys index 9f3c0a1cd..28d57f530 100644 --- a/tests/opt/opt_expr.ys +++ b/tests/opt/opt_expr.ys @@ -5,8 +5,6 @@ module opt_expr_add_test(input [3:0] i, input [7:0] j, output [8:0] o); endmodule EOT -hierarchy -auto-top - equiv_opt -assert opt_expr -fine design -load postopt @@ -22,8 +20,6 @@ module opt_expr_add_signed_test(input signed [3:0] i, input signed [7:0] j, outp endmodule EOT -hierarchy -auto-top - equiv_opt -assert opt_expr -fine design -load postopt @@ -39,8 +35,6 @@ module opt_expr_sub_test1(input [3:0] i, input [7:0] j, output [8:0] o); endmodule EOT -hierarchy -auto-top - equiv_opt -assert opt_expr -fine design -load postopt @@ -56,8 +50,6 @@ module opt_expr_sub_signed_test1(input signed [3:0] i, input signed [7:0] j, out endmodule EOT -hierarchy -auto-top - equiv_opt -assert opt_expr -fine design -load postopt @@ -73,8 +65,6 @@ module opt_expr_sub_test2(input [3:0] i, input [7:0] j, output [8:0] o); endmodule EOT -hierarchy -auto-top - equiv_opt -assert opt_expr -fine design -load postopt @@ -90,8 +80,6 @@ module opt_expr_sub_test4(input [3:0] i, output [8:0] o); endmodule EOT -hierarchy -auto-top - equiv_opt -assert opt_expr -fine design -load postopt |