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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-05 14:46:48 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-05 14:46:48 -0800 |
| commit | 0b308c68357cc85876c3c86d6e5ac8b9318329ca (patch) | |
| tree | fe86498552867fca4440d314280abc3a3a974c01 /tests | |
| parent | 5ebdc0f8e07989b79337ced0553bd28819a8cf3e (diff) | |
| download | yosys-0b308c68357cc85876c3c86d6e5ac8b9318329ca.tar.gz yosys-0b308c68357cc85876c3c86d6e5ac8b9318329ca.tar.bz2 yosys-0b308c68357cc85876c3c86d6e5ac8b9318329ca.zip | |
abc9_ops: -reintegrate to use derived_type for box_ports
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/arch/xilinx/dffs.ys | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/tests/arch/xilinx/dffs.ys b/tests/arch/xilinx/dffs.ys index dc764b033..deaf16bd6 100644 --- a/tests/arch/xilinx/dffs.ys +++ b/tests/arch/xilinx/dffs.ys @@ -8,7 +8,6 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p cd dff # Constrain all select calls below inside the top module select -assert-count 1 t:BUFG select -assert-count 1 t:FDRE - select -assert-none t:BUFG t:FDRE %% t:* %D @@ -20,6 +19,27 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p cd dffe # Constrain all select calls below inside the top module select -assert-count 1 t:BUFG select -assert-count 1 t:FDRE +select -assert-none t:BUFG t:FDRE %% t:* %D + + +design -load read +hierarchy -top dff +proc +equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx -abc9 -dff -noiopad # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd dff # Constrain all select calls below inside the top module +select -assert-count 1 t:BUFG +select -assert-count 1 t:FDRE +select -assert-none t:BUFG t:FDRE %% t:* %D + +design -load read +hierarchy -top dffe +proc +equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx -abc9 -dff -noiopad # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd dffe # Constrain all select calls below inside the top module +select -assert-count 1 t:BUFG +select -assert-count 1 t:FDRE select -assert-none t:BUFG t:FDRE %% t:* %D |